Three-dimensional NAND flash architecture design based on single-crystalline stacked array Y Kim, JG Yun, SH Park, W Kim, JY Seo, M Kang, KC Ryoo, JH Oh, ... IEEE Transactions on Electron Devices 59 (1), 35-45, 2011 | 346 | 2011 |
Single-crystalline Si stacked array (STAR) NAND flash memory JG Yun, G Kim, JE Lee, Y Kim, WB Shim, JH Lee, H Shin, JD Lee, ... IEEE Transactions on Electron Devices 58 (4), 1006-1014, 2011 | 277 | 2011 |
Synaptic characteristics of amorphous boron nitride-based memristors on a highly doped silicon substrate for neuromorphic engineering J Lee, JH Ryu, B Kim, F Hussain, C Mahata, E Sim, M Ismail, Y Abbas, ... ACS applied materials & interfaces 12 (30), 33908-33916, 2020 | 61 | 2020 |
Zinc tin oxide synaptic device for neuromorphic engineering JH Ryu, B Kim, F Hussain, M Ismail, C Mahata, T Oh, M Imran, KK Min, ... IEEE Access 8, 130678-130686, 2020 | 57 | 2020 |
Natural Local Self-Boosting Effect in 3D NAND Flash Memory M Kang, Y Kim IEEE Electron Device Letters 38 (9), 1236-1239, 2017 | 57 | 2017 |
Down-Coupling Phenomenon of Floating Channel in 3D NAND Flash Memory Y Kim, M Kang IEEE Electron Device Letters 37 (12), 1566-1569, 2016 | 55 | 2016 |
Bio-inspired synaptic functions from a transparent zinc-tin-oxide-based memristor for neuromorphic engineering JH Ryu, B Kim, F Hussain, C Mahata, M Ismail, Y Kim, S Kim Applied Surface Science 544, 148796, 2021 | 54 | 2021 |
Implementation of convolutional neural network and 8-bit reservoir computing in CMOS compatible VRRAM J Park, TH Kim, O Kwon, M Ismail, C Mahata, Y Kim, S Kim, S Kim Nano Energy 104, 107886, 2022 | 53 | 2022 |
3-D stacked synapse array based on charge-trap flash memory for implementation of deep neural networks YJ Park, HT Kwon, B Kim, WJ Lee, DH Wee, HS Choi, BG Park, JH Lee, ... IEEE Transactions on Electron Devices 66 (1), 420-427, 2018 | 49 | 2018 |
AND flash array based on charge trap flash for implementation of convolutional neural networks HS Choi, H Kim, JH Lee, BG Park, Y Kim IEEE Electron Device Letters 41 (11), 1653-1656, 2020 | 40 | 2020 |
3-D floating-gate synapse array with spike-time-dependent plasticity HS Choi, DH Wee, H Kim, S Kim, KC Ryoo, BG Park, Y Kim IEEE Transactions on Electron Devices 65 (1), 101-107, 2017 | 39 | 2017 |
Three-dimensional NAND flash memory based on single-crystalline channel stacked array Y Kim, M Kang, SH Park, BG Park IEEE electron device letters 34 (8), 990-992, 2013 | 35 | 2013 |
Implementation of Boolean logic functions in charge trap flash for in-memory computing J Lee, BG Park, Y Kim IEEE Electron Device Letters 40 (9), 1358-1361, 2019 | 34 | 2019 |
A new programming method to alleviate the program speed variation in three-dimensional stacked array NAND flash memory Y Kim, JY Seo, SH Lee, BG Park JSTS: Journal of Semiconductor Technology and Science 14 (5), 566-571, 2014 | 33 | 2014 |
3-D synapse array architecture based on charge-trap flash memory for neuromorphic application HS Choi, YJ Park, JH Lee, Y Kim Electronics 9 (1), 57, 2019 | 30 | 2019 |
Resistive switching characteristics and theoretical simulation of a Pt/a-Ta2O5/TiN synaptic device for neuromorphic applications U Rasheed, H Ryu, C Mahata, RMA Khalil, M Imran, AM Rana, F Kousar, ... Journal of Alloys and Compounds 877, 160204, 2021 | 29 | 2021 |
One transistor–two memristor based on amorphous indium–gallium–zinc-oxide for neuromorphic synaptic devices JT Jang, D Kim, WS Choi, SJ Choi, DM Kim, Y Kim, DH Kim ACS Applied Electronic Materials 2 (9), 2837-2844, 2020 | 27 | 2020 |
Predictive modeling of channel potential in 3-D NAND flash memory Y Kim, M Kang IEEE Transactions on Electron Devices 61 (11), 3901-3904, 2014 | 27 | 2014 |
F-shaped tunnel field-effect transistor (tfet) for the low-power application S Yun, J Oh, S Kang, Y Kim, JH Kim, G Kim, S Kim micromachines 10 (11), 760, 2019 | 26 | 2019 |
Program/erase model of nitride-based NAND-type charge trap flash memories DH Kim, S Cho, DH Li, JG Yun, JH Lee, GS Lee, Y Kim, WB Shim, ... Japanese Journal of Applied Physics 49 (8R), 084301, 2010 | 22 | 2010 |