| COFFE: Fully-automated transistor sizing for FPGAs C Chiasson, V Betz 2013 International Conference on Field-Programmable Technology (FPT), 34-41, 2013 | 110 | 2013 |
| Should FPGAs abandon the pass-gate? C Chiasson, V Betz 2013 23rd International Conference on Field programmable Logic and …, 2013 | 102 | 2013 |
| Architectural enhancements in intel® agilex™ fpgas J Chromczak, M Wheeler, C Chiasson, D How, M Langhammer, ... Proceedings of the 2020 ACM/SIGDA International Symposium on Field …, 2020 | 55 | 2020 |
| On hard adders and carry chains in FPGAs J Luu, C McCullough, S Wang, S Huda, B Yan, C Chiasson, KB Kent, ... 2014 IEEE 22nd Annual International Symposium on Field-Programmable Custom …, 2014 | 49 | 2014 |
| Optimizing FPGA logic block architectures for arithmetic KE Murray, J Luu, MJP Walker, C McCullough, S Wang, S Huda, B Yan, ... IEEE Transactions on Very Large Scale Integration (VLSI) Systems 28 (6 …, 2020 | 25 | 2020 |
| Optimization and modeling of FPGA circuitry in advanced process technology C Chiasson University of Toronto, 2013 | 13 | 2013 |
| Memory Circuits A 0.506-pJ 16-kb 8T SRAM With Vertical Read Wordlines and Selective Dual Split Power Lines..................... L Lu, T Yoo, VL Le, TTH Kim, MA Qureshi, J Park, S Kim, C McCullough, ... | | |
