| Carbon nanotube composites for thermal management MJ Biercuk, MC Llaguno, M Radosavljevic, JK Hyun, AT Johnson, ... Applied Physics Letters 80 (15), 2767-2769, 2002 | 2475 | 2002 |
| Group III-N transistors for system on chip (SOC) architecture integrating power management and radio frequency circuits HW Then, R Chau, V Rao, N Mukherjee, M Radosavljevic, R Pillarisetty, ... US Patent 10,290,614, 2019 | 1469* | 2019 |
| Biological physics P Nelson WH Freeman, 2004 | 1140 | 2004 |
| Benchmarking nanotechnology for high-performance and low-power logic transistor applications R Chau, S Datta, M Doczy, B Doyle, B Jin, J Kavalieros, A Majumdar, ... IEEE Transactions on Nanotechnology 4 (2), 153-158, 2005 | 881 | 2005 |
| Nonvolatile molecular memory elements based on ambipolar nanotube field effect transistors M Radosavljević, M Freitag, KV Thadani, AT Johnson Nano Letters 2 (7), 761-764, 2002 | 498 | 2002 |
| Fabrication, characterization, and physics of III–V heterojunction tunneling field effect transistors (H-TFET) for steep sub-threshold swing G Dewey, B Chu-Kung, J Boardman, JM Fastenau, J Kavalieros, R Kotlyar, ... 2011 International electron devices meeting, 33.6. 1-33.6. 4, 2011 | 452 | 2011 |
| Tunneling versus thermionic emission in one-dimensional semiconductors J Appenzeller, M Radosavljević, J Knoch, P Avouris Physical review letters 92 (4), 48301, 2004 | 390 | 2004 |
| Tri-gate transistor architecture with high-k gate dielectrics, metal gates and strain engineering J Kavalieros, B Doyle, S Datta, G Dewey, M Doczy, B Jin, D Lionberger, ... 2006 Symposium on VLSI Technology, 2006. Digest of Technical Papers., 50-51, 2006 | 349 | 2006 |
| Block contact architectures for nanoscale channel transistors M Radosavljevic, A Majumdar, BS Doyle, J Kavalieros, ML Doczy, ... US Patent 7,898,041, 2011 | 340* | 2011 |
| Transistor gate-channel arrangements GW Dewey, R Rios, S Shivaraman, M Radosavljevic, KE Millard, ... US Patent App. 16/080,101, 2019 | 293 | 2019 |
| Advanced high-K gate dielectric for high-performance short-channel In0.7Ga0.3As quantum well field effect transistors on silicon substrate for low power logic … M Radosavljevic, B Chu-Kung, S Corcoran, G Dewey, MK Hudait, ... 2009 IEEE International Electron Devices Meeting (IEDM), 1-4, 2009 | 278 | 2009 |
| Drain voltage scaling in carbon nanotube transistors M Radosavljević, S Heinze, J Tersoff, P Avouris Applied Physics Letters 83, 2435, 2003 | 268 | 2003 |
| Block contact architectures for nanoscale channel transistors M Radosavljevic, A Majumdar, BS Doyle, J Kavalieros, ML Doczy, ... US Patent 7,279,375, 2007 | 223 | 2007 |
| Block contact architectures for nanoscale channel transistors M Radosavljevic, A Majumdar, BS Doyle, J Kavalieros, ML Doczy, ... US Patent 7,279,375, 2007 | 223 | 2007 |
| 3D heterogeneous integration of high performance high-K metal gate GaN NMOS and Si PMOS transistors on 300mm high-resistivity Si substrate for energy-efficient and compact … HW Then, S Dasgupta, M Radosavljevic, P Agababov, I Ban, R Bristol, ... 2019 IEEE International Electron Devices Meeting (IEDM), 17.3. 1-17.3. 4, 2019 | 218 | 2019 |
| Application of high-< i> κ</i> gate dielectrics and metal gate electrodes to enable silicon and non-silicon logic nanotechnology R Chau, J Brask, S Datta, G Dewey, M Doczy, B Doyle, J Kavalieros, B Jin, ... Microelectronic engineering 80, 1-6, 2005 | 218 | 2005 |
| CMOS implementation of germanium and III-V nanowires and nanoribbons in gate-all-around architecture M Radosavljevic, R Pillarisetty, G Dewey, N Mukherjee, J Kavalieros, ... US Patent 9,123,567, 2015 | 213 | 2015 |
| CMOS implementation of germanium and III-V nanowires and nanoribbons in gate-all-around architecture M Radosavljevic, R Pillarisetty, G Dewey, N Mukherjee, J Kavalieros, ... US Patent 9,123,567, 2015 | 213 | 2015 |
| Electrostatics improvement in 3-D tri-gate over ultra-thin body planar InGaAs quantum well field effect transistors with high-K gate dielectric and scaled gate-to-drain/gate-to … M Radosavljevic, G Dewey, D Basu, J Boardman, B Chu-Kung, ... 2011 International Electron Devices Meeting, 33.1. 1-33.1. 4, 2011 | 196 | 2011 |
| Unexpected scaling of the performance of carbon nanotube Schottky-barrier transistors S Heinze, M Radosavljević, J Tersoff, P Avouris Physical Review B 68 (23), 235418, 2003 | 196 | 2003 |
Han Wui ThenIntel CorporationVerified email at intel.com