| Compact Modeling of LDMOS Transistors Over a Wide Temperature Range Including Cryogenics Y Machhiwar, G Gill, KN Kaushal, NR Mohapatra, H Agarwal IEEE Transactions on Electron Devices, 2023 | 4 | 2023 |
| Comprehensive high-voltage parameter extraction strategy for BSIM-BULK HV model G Gill, Y Machhiwar, G Pahwa, C Hu, H Agarwal IEEE Transactions on Electron Devices 71 (1), 70-76, 2023 | 3 | 2023 |
| Role of negative differential resistance in improving analog performance of negative capacitance FETs A Singhal, Y Machhiwar, H Agarwal 2022 IEEE International Conference on Emerging Electronics (ICEE), 1-6, 2022 | 3 | 2022 |
| ANN-based framework for modeling process induced variation using BSIM-CMG unified model A Singhal, Y Machhiwar, S Kumar, G Pahwa, H Agarwal Solid-State Electronics 220, 108988, 2024 | | 2024 |
| Optimization of Source/Drain-epi Region Height in GAA Nanosheet FET for RF Applications Y Machhiwar, P Kushwaha, H Agarwal 2024 Device Research Conference (DRC), 1-2, 2024 | | 2024 |
| Impact of Ferroelectric Polarization Gradient and Viscosity Coefficient on Performance of Negative Capacitance FET Circuits Y Machhiwar, N Chauhan, H Agarwal 2023 IEEE 20th India Council International Conference (INDICON), 679-683, 2023 | | 2023 |
Garima GillPhD, IIT JodhpurVerified email at iitj.ac.in