| Preesm: A dataflow-based rapid prototyping framework for simplifying multicore dsp programming M Pelcat, K Desnos, J Heulot, C Guy, JF Nezan, S Aridhi 2014 6th european embedded design in education and research conference …, 2014 | 145 | 2014 |
| Pimm: Parameterized and interfaced dataflow meta-model for mpsocs runtime reconfiguration K Desnos, M Pelcat, JF Nezan, SS Bhattacharyya, S Aridhi 2013 International Conference on Embedded Computer Systems: Architectures …, 2013 | 123 | 2013 |
| Software code generation for the RVC-CAL language M Wipliez, G Roquier, JF Nezan Journal of Signal Processing Systems 63, 203-213, 2011 | 98 | 2011 |
| Physical layer multi-core prototyping: A dataflow-based approach for LTE eNodeB M Pelcat, S Aridhi, J Piat, JF Nezan Springer, 2013 | 66* | 2013 |
| An open framework for rapid prototyping of signal processing applications M Pelcat, J Piat, M Wipliez, S Aridhi, JF Nezan EURASIP journal on embedded systems 2009, 1-13, 2009 | 56 | 2009 |
| Spider: A synchronous parameterized and interfaced dataflow-based rtos for multicore dsps J Heulot, M Pelcat, K Desnos, JF Nezan, S Aridhi 2014 6th European Embedded Design in Education and Research Conference …, 2014 | 50 | 2014 |
| A system-level architecture model for rapid prototyping of heterogeneous multicore embedded systems M Pelcat, JF Nezan, J Piat, J Croizer, S Aridhi Conference on Design and Architectures for Signal and Image Processing …, 2009 | 47 | 2009 |
| Reconfigurable video coding on multicore I Amer, C Lucarz, G Roquier, M Mattavelli, M Raulet, JF Nezan, ... IEEE Signal Processing Magazine 26 (6), 113-123, 2009 | 45 | 2009 |
| Scalable compile-time scheduler for multi-core architectures M Pelcat, P Menuet, S Aridhi, JF Nezan 2009 Design, Automation & Test in Europe Conference & Exhibition, 1552-1555, 2009 | 43 | 2009 |
| Hardware design and implementation of adaptive multiple transforms for the versatile video coding standard A Kammoun, W Hamidouche, F Belghith, JF Nezan, N Masmoudi IEEE Transactions on Consumer Electronics 64 (4), 424-432, 2018 | 41 | 2018 |
| Implementation of motion estimation based on heterogeneous parallel computing system with OpenCL J Zhang, JF Nezan, JG Cousin 2012 IEEE 14th International Conference on High Performance Computing and …, 2012 | 39 | 2012 |
| Automatic coarse-grain partitioning and automatic code generation for heterogeneous architectures M Raulet, M Babel, O Déforges, JF Nezan, Y Sorel 2003 IEEE Workshop on Signal Processing Systems (IEEE Cat. No. 03TH8682 …, 2003 | 33 | 2003 |
| Forward-inverse 2D hardware implementation of approximate transform core for the VVC standard A Kammoun, W Hamidouche, P Philippe, O Déforges, F Belghith, ... IEEE Transactions on Circuits and Systems for Video Technology 30 (11), 4340 …, 2019 | 32 | 2019 |
| Code generation for the MPEG reconfigurable video coding framework: From CAL actions to C functions M Wipliez, G Roquier, M Raulet, JF Nezan, O Déforges 2008 IEEE International Conference on Multimedia and Expo, 1049-1052, 2008 | 31 | 2008 |
| Hardware code generation from dataflow programs N Siret, M Wipliez, JF Nezan, A Rhatay 2010 Conference on Design and Architectures for Signal and Image Processing …, 2010 | 30 | 2010 |
| Memory Analysis and Optimized Allocation of Dataflow Applications on Shared-Memory MPSoCs: In-Depth Study of a Computer Vision Application K Desnos, M Pelcat, JF Nezan, S Aridhi Journal of Signal Processing Systems 80 (1), 19-37, 2015 | 27 | 2015 |
| Reproducible evaluation of system efficiency with a model of architecture: From theory to practice M Pelcat, A Mercat, K Desnos, L Maggiani, Y Liu, J Heulot, JF Nezan, ... IEEE transactions on computer-aided design of integrated circuits and …, 2017 | 26 | 2017 |
| On memory reuse between inputs and outputs of dataflow actors K Desnos, M Pelcat, JF Nezan, S Aridhi ACM Transactions on Embedded Computing Systems (TECS) 15 (2), 1-25, 2016 | 23 | 2016 |
| Real-time GPU-based local stereo matching method J Zhang, JF Nezan, M Pelcat, JG Cousin 2013 Conference on Design and Architectures for Signal and Image Processing …, 2013 | 23 | 2013 |
| An optimized hardware implementation of 4-point adaptive multiple transform design for post-HEVC A Kammoun, SB Jdidia, F Belghith, W Hamidouche, JF Nezan, ... 2018 4th International Conference on Advanced Technologies for Signal and …, 2018 | 21 | 2018 |
Karol DESNOSUniv Rennes, INSA Rennes, IETR, CNRS UMR6164Verified email at insa-rennes.fr