184QPS/W 64Mb/mm23D Logic-to-DRAM Hybrid Bonding with Process-Near-Memory Engine for Recommendation System D Niu, S Li, Y Wang, W Han, Z Zhang, Y Guan, T Guan, F Sun, F Xue, ... 2022 IEEE International Solid-State Circuits Conference (ISSCC) 65, 1-3, 2022 | 68 | 2022 |
Extraction of process variation parameters in FinFET technology based on compact modeling and characterization Z Zhang, X Jiang, R Wang, S Guo, Y Wang, R Huang IEEE Transactions on Electron Devices 65 (3), 847-854, 2018 | 41 | 2018 |
BlockGNN: Towards efficient GNN acceleration using block-circulant weight matrices Z Zhou, B Shi, Z Zhang, Y Guan, G Sun, G Luo 2021 58th ACM/IEEE Design Automation Conference (DAC), 1009-1014, 2021 | 40 | 2021 |
New-generation design-technology co-optimization (DTCO): Machine-learning assisted modeling framework Z Zhang, R Wang, C Chen, Q Huang, Y Wang, C Hu, D Wu, J Wang, ... 2019 Silicon Nanoelectronics Workshop (SNW), 1-2, 2019 | 38 | 2019 |
Variability-and reliability-aware design for 16/14nm and beyond technology R Huang, XB Jiang, SF Guo, PP Ren, P Hao, ZQ Yu, Z Zhang, YY Wang, ... 2017 IEEE international electron devices meeting (IEDM), 12.4. 1-12.4. 4, 2017 | 37 | 2017 |
Too noisy at the bottom?—Random telegraph noise (RTN) in advanced logic devices and circuits R Wang, S Guo, Z Zhang, Q Wang, D Wu, J Wang, R Huang 2018 IEEE International Electron Devices Meeting (IEDM), 17.2. 1-17.2. 4, 2018 | 33 | 2018 |
On the trap locations in bulk FinFETs after hot carrier degradation (HCD) Z Yu, Z Zhang, Z Sun, R Wang, R Huang IEEE Transactions on Electron Devices 67 (7), 3005-3009, 2020 | 30 | 2020 |
Hyperscale FPGA-as-a-service architecture for large-scale distributed graph neural network S Li, D Niu, Y Wang, W Han, Z Zhang, T Guan, Y Guan, H Liu, L Huang, ... Proceedings of the 49th Annual International Symposium on Computer …, 2022 | 27 | 2022 |
Investigation on the lateral trap distributions in nanoscale MOSFETs during hot carrier stress Z Sun, Z Yu, Z Zhang, J Zhang, R Wang, P Lu, R Huang IEEE Electron Device Letters 40 (4), 490-493, 2019 | 25 | 2019 |
New insights into the amplitude of random telegraph noise in nanoscale MOS devices Z Zhang, S Guo, X Jiang, R Wang, Z Zhang, P Hao, Y Wang, R Huang 2017 IEEE International Reliability Physics Symposium (IRPS), 3C-3.1-3C-3.5, 2017 | 25 | 2017 |
New approach for understanding “random device physics” from channel percolation perspectives: Statistical simulations, key factors and experimental results Z Zhang, Z Zhang, R Wang, X Jiang, S Guo, Y Wang, X Wang, B Cheng, ... 2016 IEEE International Electron Devices Meeting (IEDM), 7.2. 1-7.2. 4, 2016 | 20 | 2016 |
Aging-aware gate-level modeling for circuit reliability analysis Z Zhang, R Wang, X Shen, D Wu, J Zhang, Z Zhang, J Wang, R Huang IEEE Transactions on Electron Devices 68 (9), 4201-4207, 2021 | 18 | 2021 |
Impact of process fluctuations on reconfigurable silicon nanowire transistor X Li, X Yang, Z Zhang, T Wang, Y Sun, Z Liu, X Li, Y Shi, J Xu IEEE Transactions on Electron Devices 68 (2), 885-891, 2021 | 18 | 2021 |
Circuit reliability comparison between stochastic computing and binary computing Z Zhang, R Wang, Z Zhang, Y Zhang, S Guo, R Huang IEEE Transactions on Circuits and Systems II: Express Briefs 67 (12), 3342-3346, 2020 | 18 | 2020 |
EPQuant: A Graph Neural Network compression approach based on product quantization L Huang, Z Zhang, Z Du, S Li, H Zheng, Y Xie, N Tan Neurocomputing 503, 49-61, 2022 | 14 | 2022 |
Investigation on the amplitude distribution of random telegraph noise (RTN) in nanoscale MOS devices Z Zhang, S Guo, X Jiang, R Wang, R Huang, J Zou 2016 IEEE International Nanoelectronics Conference (INEC), 1-2, 2016 | 14 | 2016 |
Design guidelines of stochastic computing based on FinFET: A technology-circuit perspective Y Zhang, R Wang, X Jiang, Z Lin, S Guo, Z Zhang, Z Zhang, R Huang 2017 IEEE International Electron Devices Meeting (IEDM), 6.6. 1-6.6. 4, 2017 | 13 | 2017 |
Reliability-enhanced circuit design flow based on approximate logic synthesis Z Zhang, R Wang, Z Zhang, R Huang, C Meng, W Qian, Z Zhou Proceedings of the 2020 on Great Lakes Symposium on VLSI, 71-76, 2020 | 9 | 2020 |
Comprehensive study on the “Anomalous” complex RTN in advanced multi-fin bulk FinFET technology J Zhang, Z Zhang, R Wang, Z Sun, Z Zhang, S Guo, R Huang 2018 IEEE International Electron Devices Meeting (IEDM), 17.3. 1-17.3. 4, 2018 | 9 | 2018 |
Investigation on the amplitude coupling effect of random telegraph noise (RTN) in nanoscale FinFETs S Guo, Z Lin, R Wang, Z Zhang, Z Zhang, Y Wang, R Huang 2018 IEEE International Reliability Physics Symposium (IRPS), P-TX. 6-1-P-TX …, 2018 | 8 | 2018 |