| Heterogeneous Memory Architectures: A HW/SW Approach for Mixing Die-stacked and Off-package Memories M Meswani, S Blagodurov, D Roberts, J Slice, M Ignatowski, GH Loh In the International Symposium on High Performance Computer Architecture (HPCA), 2015 | 245 | 2015 |
| A Processing in Memory Taxonomy and a Case for Studying Fixed-function PIM G Loh, N Jayasena, M Oskin, M Nutter, D Roberts, M Meswani, DP Zhang, ... Workshop on Near-Data Processing, 2013 | 134 | 2013 |
| Design and Analysis of an APU for Exascale Computing T Vijayaraghavan, Y Eckert, GH Loh, MJ Schulte, M Ignatowski, ... 2017 IEEE International Symposium on High Performance Computer Architecture …, 2017 | 106 | 2017 |
| Modeling and predicting performance of high performance computing applications on hardware accelerators MR Meswani, L Carrington, D Unat, A Snavely, S Baden, S Poole The International journal of high performance computing applications 27 (2 …, 2013 | 72* | 2013 |
| Mempod: A clustered architecture for efficient and scalable migration in flat address space multi-level memories A Prodromou, M Meswani, N Jayasena, G Loh, DM Tullsen 2017 IEEE International Symposium on High Performance Computer Architecture …, 2017 | 69 | 2017 |
| Reducing energy usage with memory and computation-aware dynamic frequency scaling MA Laurenzano, M Meswani, L Carrington, A Snavely, MM Tikir, S Poole Euro-Par 2011 Parallel Processing: 17th International Conference, Euro-Par …, 2011 | 59 | 2011 |
| A new perspective on processing-in-memory architecture design DP Zhang, N Jayasena, A Lyashevsky, J Greathouse, M Meswani, ... Proceedings of the ACM SIGPLAN Workshop on Memory Systems Performance and …, 2013 | 51 | 2013 |
| Silc-fm: Subblocked interleaved cache-like flat memory organization JH Ryoo, MR Meswani, A Prodromou, LK John 2017 IEEE International Symposium on High Performance Computer Architecture …, 2017 | 44 | 2017 |
| Efficient breadth-first search on a heterogeneous processor M Daga, M Nutter, M Meswani 2014 IEEE International Conference on Big Data (Big Data), 373-382, 2014 | 42 | 2014 |
| Multi-processor apparatus and method of detection and acceleration of lagging tasks A Basu, D Yudanov, DA Roberts, MR Meswani, S Blagodurov US Patent 10,592,279, 2020 | 40 | 2020 |
| Toward efficient programmer-managed two-level memory hierarchies in exascale computers MR Meswani, GH Loh, S Blagodurov, D Roberts, J Slice, M Ignatowski 2014 Hardware-Software Co-Design for High Performance Computing, 9-16, 2014 | 27 | 2014 |
| Distributed memory controller MR Meswani, DA Roberts, Y Eckert, K Dev, J Kalamatianos, I Paul US Patent App. 14/862,011, 2017 | 26 | 2017 |
| Modeling and predicting disk I/O time of HPC applications MR Meswani, MA Laurenzano, L Carrington, A Snavely 2010 DoD High Performance Computing Modernization Program Users Group …, 2010 | 23 | 2010 |
| Hot page selection in multi-level memory hierarchies S Blagodurov, GH Loh, MR Meswani US Patent 10,235,290, 2019 | 19 | 2019 |
| Relocating infrequently-accessed dynamic random access memory (dram) data to non-volatile storage JL Greathouse, I Ciji, M Meswani US Patent App. 14/160,618, 2015 | 19 | 2015 |
| John Slice, Mike Ignatowski, and Gabriel H. Loh. Heterogeneous memory architectures: A HW/SW approach for mixing die-stacked and off-package memories MR Meswani, S Blagodurov, D Roberts Proceedings of the 21st IEEE Symposium on High Performance Computer …, 0 | 19 | |
| Ring networks for intra-and inter-memory I/O including 3D-stacked memories D Roberts, Y Eckert, M Meswani, I Paul US Patent 9,443,561, 2016 | 16 | 2016 |
| Pir: Pmac's idiom recognizer C Olschanowsky, A Snavely, MR Meswani, L Carrington 2010 39th International Conference on Parallel Processing Workshops, 189-196, 2010 | 16 | 2010 |
| Prefetching as a potentially effective technique for hybrid memory optimization M Islam, S Banerjee, M Meswani, K Kavi Proceedings of the Second International Symposium on Memory Systems, 220-231, 2016 | 15 | 2016 |
| Modeling and predicting application performance on hardware accelerators MR Meswani, L Carrington, D Unat, A Snavely, S Baden, S Poole 2011 IEEE International Symposium on Workload Characterization (IISWC), 73-73, 2011 | 15 | 2011 |
Gabriel H. LohAMD Research and Advanced Development (RAD)Verified email at amd.com