| Exploiting dual data-memory banks in digital signal processors MAR Saghir, P Chow, CG Lee ACM SIGOPS Operating Systems Review 30 (5), 234-243, 1996 | 156 | 1996 |
| A configurable multi-ported register file architecture for soft processor cores MAR Saghir, R Naous Reconfigurable Computing: Architectures, Tools and Applications: Third …, 2007 | 39 | 2007 |
| Datapath and ISA customization for soft VLIW processors MAR Saghir, M El-Majzoub, P Akl 2006 IEEE International Conference on Reconfigurable Computing and FPGA's …, 2006 | 39 | 2006 |
| Supporting multithreading in configurable soft processor cores R Moussali, N Ghanem, MAR Saghir Proceedings of the 2007 international conference on Compilers, Architecture …, 2007 | 37 | 2007 |
| Arrow: A RISC-V vector accelerator for machine learning inference IA Assir, ME Iskandarani, HRA Sandid, MAR Saghir arXiv preprint arXiv:2107.07169, 2021 | 32 | 2021 |
| Application-driven design of DSP architectures and compilers MAR Saghir, P Chow, CG Lee Proceedings of ICASSP'94. IEEE International Conference on Acoustics, Speech …, 1994 | 30 | 1994 |
| A distributed reconfigurable active SSD platform for data intensive applications N Abbani, A Ali, AO Doa'A, M Jomaa, M Sharafeddine, H Artail, H Akkary, ... 2011 IEEE International Conference on High Performance Computing and …, 2011 | 26 | 2011 |
| Reconfigurable filter implementation of a matched-filter based spectrum sensor for cognitive radio systems AH Gholamipour, A Gorcin, H Celebi, BU Toreyin, MAR Saghir, F Kurdahi, ... 2011 IEEE International Symposium of Circuits and Systems (ISCAS), 2457-2460, 2011 | 23 | 2011 |
| Hadoop extensions for distributed computing on reconfigurable active SSD clusters A Kaitoua, H Hajj, MAR Saghir, H Artail, H Akkary, M Awad, ... ACM Transactions on Architecture and Code Optimization (TACO) 11 (2), 1-26, 2014 | 22 | 2014 |
| Towards better dsp architecture and compilers M Saghir, P Chow, CG Lee Proceedings of the International Conference on Signal Processing …, 1994 | 22 | 1994 |
| FeatherNet: An accelerated convolutional neural network design for resource-constrained FPGAs R Morcel, H Hajj, MAR Saghir, H Akkary, H Artail, R Khanna, ... ACM Transactions on Reconfigurable Technology and Systems (TRETS) 12 (2), 1-27, 2019 | 18 | 2019 |
| A study of the performance of a cloud datacenter server K Mershad, H Artail, MAR Saghir, H Hajj, M Awad IEEE transactions on Cloud Computing 5 (4), 590-603, 2015 | 17 | 2015 |
| Microarchitectural enhancements for configurable multi-threaded soft processors R Moussali, N Ghanem, MAR Saghir 2007 International Conference on Field Programmable Logic and Applications …, 2007 | 16 | 2007 |
| Customizing the datapath and ISA of soft VLIW processors MAR Saghir, M El-Majzoub, P Akl High Performance Embedded Architectures and Compilers: Second International …, 2007 | 16 | 2007 |
| Application-specific instruction-set architectures for embedded DSP applications MAR Saghir University of Toronto, 1998 | 15 | 1998 |
| Speedy cloud: Cloud computing with support for hardware acceleration services H Artail, MAR Saghir, M Sharafeddin, H Hajj, A Kaitoua, R Morcel, ... IEEE Transactions on Cloud Computing 7 (3), 850-865, 2017 | 14 | 2017 |
| Dynamically reconfigurable architecture for a driver assistant system N Harb, S Niar, MAR Saghir, Y El Hillali, RB Atitallah 2011 IEEE 9th Symposium on Application Specific Processors (SASP), 62-65, 2011 | 14 | 2011 |
| A portable MIDI controller using EMG-based individual finger motion classification F Bitar, N Madi, E Ramly, M Saghir, F Karameh 2007 IEEE Biomedical Circuits and Systems Conference, 138-141, 2007 | 12 | 2007 |
| Automatic data partitioning for HLL DSP compilers MAR Saghir, P Chow, CG Lee Proceedings of the 6th International Conference on Signal Processing …, 1995 | 12 | 1995 |
| On the effectiveness of accelerating MapReduce functions using the Xilinx Vivado HLS tool M Sharafeddin, MAR Saghir, H Akkary, H Artail, H Hajj International Journal of High Performance Systems Architecture 6 (1), 1-12, 2016 | 11 | 2016 |
