T2s-tensor: Productively generating high-performance spatial hardware for dense tensor computations N Srivastava, H Rong, P Barua, G Feng, H Cao, Z Zhang, D Albonesi, ... 2019 IEEE 27th Annual International Symposium on Field-Programmable Custom …, 2019 | 67 | 2019 |
Blankit library debloating: Getting what you want instead of cutting what you don’t C Porter, G Mururu, P Barua, S Pande Proceedings of the 41st ACM SIGPLAN Conference on Programming Language …, 2020 | 52 | 2020 |
MLIR as hardware compiler infrastructure S Eldridge, P Barua, A Chapyzhenka, A Izraelevitz, J Koenig, C Lattner, ... Workshop on Open-Source EDA Technology (WOSET) 3, 2021 | 31 | 2021 |
OMPSan: static verification of OpenMP’s data mapping constructs P Barua, J Shirako, W Tsang, J Paudel, W Chen, V Sarkar OpenMP: Conquering the Full Hardware Spectrum: 15th International Workshop …, 2019 | 12 | 2019 |
Cost-driven thread coarsening for GPU kernels P Barua, J Shirako, V Sarkar Proceedings of the 27th International Conference on Parallel Architectures …, 2018 | 9 | 2018 |
Binary debloating for security via demand driven loading G Mururu, C Porter, P Barua, S Pande arXiv preprint arXiv:1902.06570, 2019 | 7 | 2019 |
A cryptosystem for encryption and decryption of long confidential messages D Giri, P Barua, PD Srivastava, B Jana Information Security and Assurance: 4th International Conference, ISA 2010 …, 2010 | 7 | 2010 |
Ompmemopt: Optimized memory movement for heterogeneous computing P Barua, J Zhao, V Sarkar European Conference on Parallel Processing, 200-216, 2020 | 6 | 2020 |
Analysis for modeling data cache utilization WH Tsang, P Barua, E Tiotto, B Mahjour, J Shirako US Patent 11,630,654, 2023 | | 2023 |
Memory access scheduling to reduce thread migrations S Damani, P Barua, V Sarkar Proceedings of the 31st ACM SIGPLAN International Conference on Compiler …, 2022 | | 2022 |
Compiler analysis and optimization of memory management In modern processors PA Barua Georgia Institute of Technology, 2021 | | 2021 |