| Evaluation of the potential performance of graphene nanoribbons as on-chip interconnects S Rakheja, V Kumar, A Naeemi Proceedings of the IEEE 101 (7), 1740-1765, 2013 | 158 | 2013 |
| Performance and energy-per-bit modeling of multilayer graphene nanoribbon conductors V Kumar, S Rakheja, A Naeemi IEEE transactions on electron devices 59 (10), 2753-2761, 2012 | 113 | 2012 |
| Modeling and optimization for multi-layer graphene nanoribbon conductors V Kumar, S Rakheja, A Naeemi 2011 IEEE International Interconnect Technology Conference, 1-3, 2011 | 37 | 2011 |
| Airgap interconnects: Modeling, optimization, and benchmarking for backplane, pcb, and interposer applications V Kumar, R Sharma, E Uzunlar, L Zheng, R Bashirullah, P Kohl, MS Bakir, ... Components, Packaging and Manufacturing Technology, IEEE Transactions on 4 …, 2014 | 36 | 2014 |
| Comparison of electrical, optical and plasmonic on-chip interconnects based on delay and energy considerations S Rakheja, V Kumar Thirteenth International Symposium on Quality Electronic Design (ISQED), 732-739, 2012 | 33 | 2012 |
| An overview of 3D integrated circuits V Kumar, A Naeemi 2017 IEEE MTT-S International Conference on Numerical Electromagnetic and …, 2017 | 23 | 2017 |
| Hafnia-Based FeRAM: A Path Toward Ultra-High Density for Next-Generation High-Speed Embedded Memory N Haratipour, SC Chang, S Shivaraman, C Neumann, YC Liao, ... IEDM, 6.7.1-6.7.4, 2022 | 21 | 2022 |
| BEOL scaling limits and next generation technology prospects A Naeemi, A Ceyhan, V Kumar, C Pan, RM Iraei, S Rakheja Proceedings of the 51st Annual Design Automation Conference, 1-6, 2014 | 19 | 2014 |
| Analytical models for the frequency response of multi-layer graphene nanoribbon interconnects V Kumar, A Naeemi 2012 IEEE international symposium on electromagnetic compatibility, 440-445, 2012 | 18 | 2012 |
| Design and fabrication of low-loss horizontal and vertical interconnect links using air-clad transmission lines and through silicon vias R Sharma, E Uzunlar, V Kumar, R Saha, X Yeow, R Bashirullah, ... 2012 IEEE 62nd Electronic Components and Technology Conference, 2005-2012, 2012 | 15 | 2012 |
| Review of multi-layer graphene nanoribbons for on-chip interconnect applications V Kumar, S Rakheja, A Naeemi Electromagnetic Compatibility (EMC), 2013 IEEE International Symposium on …, 2013 | 11 | 2013 |
| IEEE Trans. Elec. Dev. JF Zhang, V Kumar, H Oh, L Zheng, GS May, A Naeemi, MS Bakir IEEE Trans. Elec. Dev 63, 2510-2516, 2016 | 10 | 2016 |
| Impact of on-chip interconnect on the performance of 3-D integrated circuits with through-silicon vias: Part II X Zhang, V Kumar, H Oh, L Zheng, GS May, A Naeemi, MS Bakir IEEE Transactions on Electron Devices 63 (6), 2510-2516, 2016 | 10 | 2016 |
| Impact of on-chip interconnect on the performance of 3-D integrated circuits with through silicon vias: Part i V Kumar, H Oh, X Zhang, L Zheng, MS Bakir, A Naeemi IEEE Transactions on Electron Devices 63 (6), 2503-2509, 2016 | 9 | 2016 |
| Modeling, optimization and benchmarking of chip-to-chip electrical interconnects with low loss air-clad dielectrics V Kumar, R Bashirullah, A Naeemi 2011 IEEE 61st Electronic Components and Technology Conference (ECTC), 2084-2090, 2011 | 8 | 2011 |
| Design and fabrication of ultra low-loss, high-performance 3D chip-chip air-clad interconnect pathway E Uzunlar, R Sharma, R Saha, V Kumar, R Bashirullah, A Naeemi, ... Electronic Components and Technology Conference (ECTC), 2013 IEEE 63rd, 1425 …, 2013 | 6 | 2013 |
| Performance modeling for emerging interconnect technologies in CMOS and beyond-CMOS circuits SC Chang, A Ceyhan, V Kumar, A Naeemi Proceedings of the 2014 international symposium on Low power electronics and …, 2014 | 3 | 2014 |
| Compact modeling and optimization of fine-pitch interconnects for silicon interposers V Kumar, L Zheng, M Bakir, A Naeemi Interconnect Technology Conference (IITC), 2013 IEEE International, 1-3, 2013 | 3 | 2013 |
| System level analysis and benchmarking of graphene interconnects for low-power applications V Kumar, R Nashed, K Brenner, R Sandhu, A Naeemi Electromagnetic Compatibility (EMC), 2014 IEEE International Symposium on …, 2014 | 2 | 2014 |
| Compact modeling and performance optimization of 3D chip-to-chip interconnects with transmission lines, vias and discontinuities V Kumar, R Sharma, J Chen, A Kapoor, R Bashirullah, P Kohl, A Naeemi 2012 IEEE international interconnect technology conference, 1-3, 2012 | 2 | 2012 |
Azad NaeemiProfessor of Electrical and Computer Engineering, Georgia Institute of TechnologyVerified email at gatech.edu