| COMBA: A comprehensive model-based analysis framework for high level synthesis of real applications J Zhao, L Feng, S Sinha, W Zhang, Y Liang, B He 2017 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 430-437, 2017 | 156 | 2017 |
| Performance Modeling and Directives Optimization for High-Level Synthesis on FPGA J Zhao, L Feng, S Sinha, W Zhang, Y Liang, B He IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2019 | 71 | 2019 |
| Machine Learning Based Routing Congestion Prediction in FPGA High-Level Synthesis J Zhao, T Liang, S Sinha, W Zhang 2019 Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2019 | 64 | 2019 |
| Low-Power FPGA Design Using Memoization-Based Approximate Computing S Sinha, W Zhang IEEE Transactions on Very Large Scale Integration (VLSI) Systems 24 (8 …, 2016 | 41 | 2016 |
| HL-Pow: A Learning-Based Power Modeling Framework for High-Level Synthesis Z Lin, J Zhao, S Sinha, W Zhang 2020 25th Asia and South Pacific Design Automation Conference (ASP-DAC), 574-580, 2020 | 39 | 2020 |
| Paas: A system level simulator for heterogeneous computing architectures T Liang, L Feng, S Sinha, W Zhang 2017 27th International Conference on Field Programmable Logic and …, 2017 | 25 | 2017 |
| FP-Stereo: Hardware-Efficient Stereo Vision for Embedded Applications J Zhao, T Liang, L Feng, W Ding, S Sinha, W Zhang, S Shen 2020 30th International Conference on Field-Programmable Logic and …, 2020 | 24 | 2020 |
| Towards Efficient and Scalable Acceleration of Online Decision Tree Learning on FPGA Z Lin, S Sinha, W Zhang 2019 IEEE 27th Annual International Symposium on Field-Programmable Custom …, 2019 | 21 | 2019 |
| FinTech: The New Frontier S Sinha IEEE Potentials 36 (6), 6-7, 2017 | 18 | 2017 |
| Load-Step: A Precise TrustZone Execution Control Framework for Exploring New Side-channel Attacks Like Flush+ Evict Z Kou, W He, S Sinha, W Zhang 2021 58th ACM/IEEE Design Automation Conference (DAC), 979-984, 2021 | 17 | 2021 |
| A Survey of Algorithmic and Hardware Optimization Techniques for Vision Convolutional Neural Networks on FPGAs A Sateesan, S Sinha, S KG, AP Vinod Neural Processing Letters 53 (3), 2331-2377, 2021 | 17 | 2021 |
| Parallelizing Hardware Tasks on Multi-Context FPGA with Efficient Placement and Scheduling Algorithms H Liang, S Sinha, W Zhang IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2018 | 17 | 2018 |
| Heterosim: A heterogeneous cpu-fpga simulator L Feng, H Liang, S Sinha, W Zhang IEEE Computer Architecture Letters 16 (1), 38-41, 2017 | 17 | 2017 |
| AMF-Placer: High-Performance Analytical Mixed-size Placer for FPGA T Liang, G Chen, J Zhao, S Sinha, W Zhang 2021 IEEE/ACM International Conference On Computer Aided Design (ICCAD), 1-9, 2021 | 16 | 2021 |
| Hi-ClockFlow: Multi-Clock Dataflow Automation and Throughput Optimization in High-Level Synthesis T Liang, J Zhao, L Feng, S Sinha, W Zhang 2019 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 1-6, 2019 | 16 | 2019 |
| Optimization of Convolutional Neural Networks on Resource Constrained Devices A Sateesan, S Sinha, S KG 2019 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 2019 | 16 | 2019 |
| An Ensemble Learning Approach for In-Situ Monitoring of FPGA Dynamic Power Z Lin, S Sinha, W Zhang IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2018 | 16 | 2018 |
| Hi-DMM: High-Performance Dynamic Memory Management in High-Level Synthesis T Liang, J Zhao, L Feng, S Sinha, W Zhang IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2018 | 15 | 2018 |
| Understanding industrial espionage for greater technological and economic security S Sinha IEEE Potentials 31 (3), 37-41, 2012 | 13 | 2012 |
| Hard-ODT: Hardware-Friendly Online Decision Tree Learning Algorithm and System Z Lin, S Sinha, W Zhang IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2020 | 11 | 2020 |
Wei ZhangHong Kong University of Science and TechnologyVerified email at ust.hk
