| AC-PM: An area-efficient and configurable polynomial multiplier for lattice based cryptography X Hu, J Tian, M Li, Z Wang IEEE Transactions on Circuits and Systems I: Regular Papers 70 (2), 719-732, 2022 | 29 | 2022 |
| Reconfigurable and high-efficiency polynomial multiplication accelerator for crystals-kyber M Li, J Tian, X Hu, Z Wang IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2022 | 24 | 2022 |
| Rethinking parallel memory access pattern in number theoretic transform design Y Geng, X Hu, M Li, Z Wang IEEE Transactions on Circuits and Systems II: Express Briefs 70 (5), 1689-1693, 2023 | 14 | 2023 |
| High-speed and scalable FPGA implementation of the key generation for the Leighton-Micali signature protocol Y Song, X Hu, W Wang, J Tian, Z Wang 2021 IEEE International Symposium on Circuits and Systems (ISCAS), 1-5, 2021 | 11 | 2021 |
| A novel modular multiplier for isogeny-based post-quantum cryptography B Wu, J Tian, X Hu, Z Wang 2020 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 334-339, 2020 | 7 | 2020 |
| Efficient homomorphic convolution designs on FPGA for secure inference X Hu, M Li, J Tian, Z Wang IEEE Transactions on Very Large Scale Integration (VLSI) Systems 30 (11 …, 2022 | 6 | 2022 |
| Fast permutation architecture on encrypted data for secure neural network inference X Hu, J Tian, Z Wang 2020 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS), 141-144, 2020 | 6 | 2020 |
| DARM: A low-complexity and fast modular multiplier for lattice-based cryptography X Hu, M Li, J Tian, Z Wang 2021 IEEE 32nd International Conference on Application-specific Systems …, 2021 | 5 | 2021 |
| High-speed and low-complexity modular reduction design for crystals-kyber M Li, J Tian, X Hu, Y Cao, Z Wang 2022 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS), 1-5, 2022 | 4 | 2022 |
| A high-speed FPGA-based hardware implementation for Leighton-Micali signature Y Song, X Hu, J Tian, Z Wang IEEE Transactions on Circuits and Systems I: Regular Papers 70 (1), 241-252, 2022 | 4 | 2022 |
| ALT: Area-Efficient and Low-Latency FPGA Design for Torus Fully Homomorphic Encryption X Hu, Z Li, Z Wang, X Lu IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2024 | 1 | 2024 |
| Interaction effects of anisotropic roughness interface and component shape characteristics on fatigue life of thermal barrier coatings Y Yao, Y Ai, P Guan, T Bao, J Tian, X Hu Journal of the American Ceramic Society, e20380, 2025 | | 2025 |
| GS-MDC: High-Speed and Area-Efficient Number Theoretic Transform Design Y Geng, X Hu, Z Wang IEEE Transactions on Circuits and Systems II: Express Briefs, 2024 | | 2024 |
| 基于 FPGA 的 Leighton-Micali 签名方案密钥生成的高速可配置实现 胡潇， 宋逸峰， 汪文浩， 田静 信息安全学报 6 (6), 17-31, 2021 | | 2021 |
Zhongfeng WangNanjing UniversityVerified email at nju.edu.cn