| Hardware-software partitioning in embedded system design P Arató, S Juhász, ZÁ Mann, A Orbán, D Papp IEEE International Symposium on Intelligent Signal Processing, 2003, 197-202, 2003 | 182 | 2003 |
| Algorithmic aspects of hardware/software partitioning P Arató, ZÁ Mann, A Orbán ACM Transactions on Design Automation of Electronic Systems (TODAES) 10 (1 …, 2005 | 162 | 2005 |
| High level synthesis of pipelined datapaths P Arató, V Tamas, I Jankovits John Wiley & Sons, Inc., 2001 | 73 | 2001 |
| Finding optimal hardware/software partitions ZÁ Mann, A Orbán, P Arató Formal Methods in System Design 31, 241-263, 2007 | 40 | 2007 |
| Time-constrained scheduling of large pipelined datapaths P Arató, ZÁ Mann, A Orbán Journal of Systems Architecture 51 (12), 665-687, 2005 | 21 | 2005 |
| Extending component-based design with hardware components P Arató, ZÁ Mann, A Orbán Science of Computer Programming 56 (1-2), 23-39, 2005 | 14 | 2005 |
| Hardware-software co-design for Kohonen’s self-organizing map P Arató, ZÁ Mann, A Orbán Proceedings of the IEEE 7th international conference on intelligent …, 2003 | 14 | 2003 |
| Specification and realisation of logic control procedures on the basis of prescribed input-output changes P Arato Periodica Polytechnica Electrical Engineering (Archives) 31 (3-4), 99-153, 1987 | 12 | 1987 |
| Analyzing the Effect of Decomposition Algorithms on the Heterogeneous Multiprocessing Architectures in System Level Synthesis P Arató, D Drexler, G Rácz Scientific Buletin of Politechnica University of Timisoara Transactions on …, 2015 | 10 | 2015 |
| A high-level datapath synthesis method for pipelined structures P Arató, A Rucinski, R Davis, R Torbert Microelectronics journal 25 (3), 237-247, 1994 | 9 | 1994 |
| A modified inertial method for loop-free decomposition of acyclic directed graphs P Arató MACRo 2015 1 (1), 61-72, 2015 | 8 | 2015 |
| A data flow graph generation method starting from C description by handling loop nest hierarchy P Arató, G Suba 2014 IEEE 9th IEEE International Symposium on Applied Computational …, 2014 | 7 | 2014 |
| Some components of a new methodology of system-level synthesis P Arató, B Csák, T Kandár, Z Mohr INES2002 Hotel Adriatic (Opatija, Croatia), 2002 | 7 | 2002 |
| Value prediction in HLS allocation problems using intellectual properties Z Palotai, T Kandár, Z Mohr, T Visegrády, G Ziegler, P Arató, A Lúrincz Applied Artificial Intelligence 16 (2), 117-157, 2002 | 7 | 2002 |
| Genetic scheduling algorithm for high-level synthesis P Arató, ZÁ Mann, A Orbán Proceedings of the IEEE 6th International Conference on Intelligent …, 2002 | 7 | 2002 |
| Component-based hardware-software co-design P Arató, ZÁ Mann, A Orbán International Conference on Architecture of Computing Systems, 169-183, 2004 | 6 | 2004 |
| Systematic VHDL code generation using pipeline operations produced by high level synthesis P Arato, T Kandár IEEE International Symposium on Intelligent Signal Processing, 2003, 191-196, 2003 | 6 | 2003 |
| A decomposition-based system level synthesis method for heterogeneous multiprocessor architectures G Rácz, P Arató 2017 30th IEEE International System-on-Chip Conference (SOCC), 381-386, 2017 | 5 | 2017 |
| A method for avoiding loops while decomposing the task description graph in system-level synthesis P Arató, DA Drexler, G Kocza 2014 IEEE 9th IEEE International Symposium on Applied Computational …, 2014 | 5 | 2014 |
| Micromanipulation sensor structure: a new approach P Arató, L Vajta, G Felső IFAC Proceedings Volumes 30 (19), 607-611, 1997 | 5 | 1997 |
