| B*-trees: A new representation for non-slicing floorplans YC Chang, YW Chang, GM Wu, SW Wu Proceedings of the 37th Annual Design Automation Conference, 458-463, 2000 | 734 | 2000 |
| Electronic design automation: synthesis, verification, and test LT Wang, YW Chang, KTT Cheng Morgan Kaufmann, 2009 | 375 | 2009 |
| NTUplace3: An analytical placer for large-scale mixed-size designs with preplaced blocks and density constraints TC Chen, ZW Jiang, TC Hsu, HC Chen, YW Chang IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2008 | 371 | 2008 |
| TCG: A transitive closure graph-based representation for non-slicing floorplans JM Lin, YW Chang Proceedings of the 38th annual Design Automation Conference, 764-769, 2001 | 331 | 2001 |
| Method of analytical placement with weighted-average wirelength model V Balabanov, MK Hsu, YW Chang US Patent 8,689,164, 2014 | 264 | 2014 |
| Universal switch modules for FPGA design YW Chang, DF Wong, CK Wong ACM Transactions on Design Automation of Electronic Systems (TODAES) 1 (1 …, 1996 | 235 | 1996 |
| BioRoute: A network-flow-based routing algorithm for the synthesis of digital microfluidic biochips PH Yuh, CL Yang, YW Chang IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2008 | 201 | 2008 |
| Modern floorplanning based on B/sup*/-tree and fast simulated annealing TC Chen, YW Chang IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2006 | 195 | 2006 |
| TSV-aware analytical placement for 3D IC designs MK Hsu, YW Chang, V Balabanov Proceedings of the 48th Design Automation Conference, 664-669, 2011 | 137 | 2011 |
| TCG-S: Orthogonal coupling of P*-admissible representations for general floorplans JM Lin, YW Chang Proceedings of the 39th Annual Design Automation Conference, 842-847, 2002 | 125 | 2002 |
| Recent research and emerging challenges in physical design for manufacturability/reliability CW Lin, MC Tsai, KY Lee, TC Chen, TC Wang, YW Chang 2007 Asia and South Pacific Design Automation Conference, 238-243, 2007 | 119 | 2007 |
| TSV-aware analytical placement for 3-D IC designs based on a novel weighted-average wirelength model MK Hsu, V Balabanov, YW Chang IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2013 | 110 | 2013 |
| A novel layout decomposition algorithm for triple patterning lithography SY Fang, YW Chang, WY Chen Proceedings of the 49th Annual Design Automation Conference, 1185-1190, 2012 | 108 | 2012 |
| An integer linear programming based routing algorithm for flip-chip design JW Fang, CH Hsu, YW Chang Proceedings of the 44th annual Design Automation Conference, 606-611, 2007 | 108 | 2007 |
| Analog placement based on symmetry-island formulation PH Lin, YW Chang, SC Lin IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2009 | 106 | 2009 |
| A high-quality mixed-size analytical placer considering preplaced blocks and density constraints TC Chen, ZW Jiang, TC Hsu, HC Chen, YW Chang Proceedings of the 2006 IEEE/ACM International Conference on Computer-Aided …, 2006 | 102 | 2006 |
| Modern floorplanning based on fast simulated annealing TC Chen, YW Chang Proceedings of the 2005 international symposium on Physical design, 104-112, 2005 | 101 | 2005 |
| Placement of defect-tolerant digital microfluidic biochips using the T-tree formulation PH Yuh, CL Yang, YW Chang ACM Journal on Emerging Technologies in Computing Systems (JETC) 3 (3), 13-es, 2007 | 99 | 2007 |
| High-performance global routing with fast overflow reduction HY Chen, CH Hsu, YW Chang 2009 Asia and South Pacific Design Automation Conference, 582-587, 2009 | 95 | 2009 |
| Voltage island aware floorplanning for power and timing optimization WP Lee, HY Liu, YW Chang Proceedings of the 2006 IEEE/ACM international conference on Computer-aided …, 2006 | 95 | 2006 |
Tung-Chieh ChenSynopsysVerified email at eda.ee.ntu.edu.tw