| 16.8 A 25.4-to-29.5 GHz 10.2 mW isolated sub-sampling PLL achieving-252.9 dB jitter-power FoM and-63dBc reference spur Z Yang, Y Chen, S Yang, PI Mak, RP Martins 2019 IEEE International Solid-State Circuits Conference-(ISSCC), 270-272, 2019 | 108* | 2019 |
| A 0.2-V Energy-Harvesting BLE Transmitter With a Micropower Manager Achieving 25% System Efficiency at 0-dBm Output and 5.2-nW Sleep Power in 28-nm CMOS S Yang, J Yin, H Yi, WH Yu, PI Mak, RP Martins IEEE Journal of Solid-State Circuits 54 (no. 5), pp. 1351–1362, 2019 | 89 | 2019 |
| A 0.2V energy-harvesting BLE transmitter with a micropower manager achieving 25% system efficiency at 0dBm output and 5.2nW sleep power in 28nm CMOS J Yin, S Yang, H Yi, WH Yu, PI Mak, RP Martins 2018 IEEE International Solid - State Circuits Conference - (ISSCC), 2018 | 89 | 2018 |
| A 0.0056-mm2 −249-dB-FoM All-Digital MDLL Using a Block-Sharing Offset-Free Frequency-Tracking Loop and Dual Multiplexed-Ring VCOs S Yang, J Yin, PI Mak, RP Martins IEEE Journal of Solid-State Circuits 54 (1), 88-98, 2018 | 51 | 2018 |
| A 10.6-mW 26.4-GHz dual-loop type-II phase-locked loop using dynamic frequency detector and phase detector Z Yang, Y Chen, S Yang, PI Mak, RP Martins IEEE Access 8, 2222-2232, 2019 | 26 | 2019 |
| A 0.0056mm2all-digital MDLL using edge re-extraction, dual-ring VCOs and a 0.3mW block-sharing frequency tracking loop achieving 292fsrmsJitter and −249dB … S Yang, J Yin, PI Mak, RP Martins 2018 IEEE International Solid-State Circuits Conference-(ISSCC), 118-120, 2018 | 25 | 2018 |
| A 0.12-mm2 1.2-to-2.4-mW 1.3-to-2.65-GHz Fractional-N Bang-Bang Digital PLL With 8- s Settling Time for Multi-ISM-Band ULP Radios KF Un, G Qi, J Yin, S Yang, S Yu, CI Ieong, PI Mak, RP Martins IEEE Transactions on Circuits and Systems I: Regular Papers 66 (9), 3307-3316, 2019 | 19 | 2019 |
| A 600-μm² Ring-VCO-Based Hybrid PLL Using a 30-μW Charge-Sharing Integrator in 28-nm CMOS S Yang, J Yin, T Xu, T Yi, PI Mak, Q Li, RP Martins IEEE Transactions on Circuits and Systems II: Express Briefs 68 (9), 3108-3112, 2021 | 14 | 2021 |
| A 104μW EMI-resisting bandgap voltage reference achieving− 20dB PSRR, and 5% DC shift under a 4dBm EMI level S Yang, PI Mak, RP Martins 2014 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS), 57-60, 2014 | 10 | 2014 |
| A digital readout integrated circuit based on pixel-level ADC incorporating on-chip image algorithm calibration for IRFPA Y Zeng, S Yang, Y Liu, R Bao, Z Zhu, J Lin, X Zhou, Y Chen, J Yin, PI Mak, ... IEEE Sensors Journal, 2023 | 7 | 2023 |
| A low-power RC oscillator with offset and path delay cancellation Y Liu, Z Zhu, R Bao, S Yang, J Liu, X Zhou, Q Li 2021 IEEE International Conference on Integrated Circuits, Technologies and …, 2021 | 6 | 2021 |
| Ring-VCO-based phase-locked loops for clock generation–design considerations and state-of-the-art S Yang, J Yin, Y Liu, Z Zhu, R Bao, J Lin, H Li, Q Li, PI Mak, RP Martins Chip 2 (2), 100051, 2023 | 4 | 2023 |
| A Compact Sub-nW/kHz Relaxation Oscillator Using a Negative-Offset Comparator With Chopping and Piecewise Charge-Acceleration in 28-nm CMOS Y Liu, Z Zhu, R Bao, J Lin, J Yin, Q Li, PI Mak, S Yang IEEE Transactions on Circuits and Systems I: Regular Papers, 2023 | 3 | 2023 |
| On the DC-Settling Process of the Pierce Crystal Oscillator in Start-Up Z Zhang, S Yang, Y Liu, Z Zhu, J Lin, R Bao, T Xu, Z Yang, M Zhang, J Liu, ... IEEE Transactions on Circuits and Systems II: Express Briefs 70 (1), 26-30, 2022 | 3 | 2022 |
| A two-stage X-band 20.7-dBm power amplifier in 40-nm CMOS technology Z Li, S Yang, SBS Lee, KS Yeo Electronics 9 (12), 2198, 2020 | 3 | 2020 |
| CMOS transformer design for X-band power amplifier applications Z Li, S Yang, H Liu, KS Yeo 2020 IEEE 15th International Conference on Solid-State & Integrated Circuit …, 2020 | 3 | 2020 |
| A 0.0043-mm2 0.085-μW/MHz Relaxation Oscillator Using Charge-Prestored Asymmetric Swings R-RC Network Y Wei, S Yang, Y Liu, R Bao, Z Zhu, J Lin, Z Zhang, Y Chen, J Yin, PI Mak, ... IEEE Transactions on Very Large Scale Integration (VLSI) Systems 31 (8 …, 2023 | 2 | 2023 |
| A 640× 512 30μm Pixel Pitch 1.8 mK-NETD 90.1 dB-SNR Digital Read-out Integrated Circuit with Fully On-chip Image Algorithm Pixel-Level Calibration Y Zeng, S Yang, Y Liu, Z Li, W Huang, X Huang, X Zhou, J Liu, Q Li 2021 IEEE Asian Solid-State Circuits Conference (A-SSCC), 1-3, 2021 | 2 | 2021 |
| Accurate performance evaluation of jitter-power FOM for multiplying delay-locked loop Y Liu, R Bao, Z Zhu, S Yang, X Zhou, J Yin, PI Mak, Q Li IEEE Transactions on Circuits and Systems I: Regular Papers 69 (2), 495-505, 2021 | 2 | 2021 |
| Analyses Concerning the Phase Noise and Nonlinear Behavior of the Charge-Sharing Integrator-Based Hybrid PLL J Song, X Yang, J Liu, Y Liu, Z Zhu, Z Han, Z Zhang, J Liu, H Zhang, J Yin, ... IEEE Transactions on Circuits and Systems I: Regular Papers, 2024 | | 2024 |