| Programmable impedance control circuit NS Kim, UR Cho US Patent 6,525,558, 2003 | 91 | 2003 |
| Impedance control circuit NS Kim, UR Cho US Patent 6,573,746, 2003 | 86 | 2003 |
| A 14-nm 0.14-psrmsFractional-N Digital PLL With a 0.2-ps Resolution ADC-Assisted Coarse/Fine-Conversion Chopping TDC and TDC Nonlinearity Calibration CW Yao, R Ni, C Lau, W Wu, K Godbole, Y Zuo, S Ko, NS Kim, S Han, I Jo, ... IEEE Journal of Solid-State Circuits 52 (12), 3446-3457, 2017 | 72 | 2017 |
| A high data-rate energy-efficient triple-channel UWB-based cognitive radio NS Kim, JM Rabaey IEEE Journal of Solid-State Circuits 51 (4), 809-820, 2016 | 68 | 2016 |
| Programmable impedance control circuit NS Kim, UR Cho US Patent 6,661,250, 2003 | 56 | 2003 |
| Programmable termination circuit and method NS Kim, UR Cho US Patent 6,642,740, 2003 | 47 | 2003 |
| Semiconductor device with impedance control circuit TH Kim, UR Cho, NS Kim US Patent 6,947,336, 2005 | 43 | 2005 |
| Programmable impedance control circuit and method thereof NS Kim, UR Cho US Patent 6,429,679, 2002 | 41 | 2002 |
| A dual-resolution wavelet-based energy detection spectrum sensing for UWB-based cognitive radios NS Kim, JM Rabaey IEEE Transactions on Circuits and Systems I: Regular Papers 65 (7), 2279-2292, 2017 | 33 | 2017 |
| Programmable Digital On-Chip Terminator SC Kim, NS Kim, TH Kim, UR Cho, HG Byun, S Kim Proceedings of the IEEK Conference, 1571-1574, 2002 | 33 | 2002 |
| A 1.2 V 1.5 Gb/s 72Mb DDR3 SRAM UR Cho, TH Kim, YJ Yoon, JC Lee, DG Bae, NS Kim, KY Kim, YJ Son, ... IEEE Journal of Solid-State Circuits, 1943-1951, 2003 | 29 | 2003 |
| A 3.1–10.6-GHz 57-bands CMOS frequency synthesizer for UWB-based cognitive radios NS Kim, JM Rabaey IEEE transactions on microwave theory and techniques 66 (9), 4134-4146, 2018 | 24 | 2018 |
| Denoising traffic collision data using ensemble empirical mode decomposition (EEMD) and its application for constructing continuous risk profile (CRP) NS Kim, K Chung, S Ahn, JW Yu, K Choi Accident Analysis & Prevention 71, 29-37, 2014 | 22 | 2014 |
| Impedance updating apparatus of termination circuit and impedance updating method thereof NS Kim, UR Cho US Patent 6,556,038, 2003 | 22 | 2003 |
| 24.8 A 14nm fractional-N digital PLL with 0.14psrmsjitter and −78dBc fractional spur for cellular RFICs CW Yao, WF Loke, R Ni, Y Han, H Li, K Godbole, Y Zuo, S Ko, NS Kim, ... 2017 IEEE International Solid-State Circuits Conference (ISSCC), 422-423, 2017 | 20 | 2017 |
| Delay-locked loop circuits and method for generating transmission core clock signals NS Kim, UR Cho US Patent 7,825,710, 2010 | 19 | 2010 |
| Multi-mode sub-Nyquist rate digital-to-analog conversion for direct waveform synthesis SYS Chen, NS Kim, JM Rabaey 2008 IEEE Workshop on Signal Processing Systems, 112-117, 2008 | 19 | 2008 |
| A 10b 600MS/s multi-mode CMOS DAC for multiple Nyquist zone operation SYS Chen, NS Kim, J Rabaey 2011 Symposium on VLSI Circuits-Digest of Technical Papers, 66-67, 2011 | 17 | 2011 |
| Semiconductor memory device with hierarchical bit line structure NS Kim, JC Lee, H Yu, UR Cho US Patent 7,489,570, 2009 | 15 | 2009 |
| Delay circuit using current source JW Park, NS Kim US Patent 6,509,774, 2003 | 13 | 2003 |
Jan RabaeyProfessor of EECS, University of California at BerkeleyDirección de correo verificada de berkeley.edu