15.3 A 1V 77dB-DR 72dB-SNDR 10MHz-BW 2-1 MASH CT ΔΣM B Nowacki, N Paulino, J Goes
2016 IEEE International Solid-State Circuits Conference (ISSCC), 274-275, 2016
47 2016 A Third-Order MASH B Nowacki, N Paulino, J Goes
IEEE Transactions on Circuits and Systems I: Regular Papers 64 (11), 2871-2883, 2017
33 2017 Design methodology for sigma-delta modulators based on a genetic algorithm using hybrid cost functions JLA de Melo, B Nowacki, N Paulino, J Goes
2012 IEEE International Symposium on Circuits and Systems (ISCAS), 301-304, 2012
25 2012 A simple 1 GHz non-overlapping two-phase clock generators for SC circuits B Nowacki, N Paulino, J Goes
Proceedings of the 20th international conference mixed design of integrated …, 2013
23 2013 A 1.2 V 300 μW second-order switched-capacitor Δ∑ modulator using ultra incomplete settling with 73 dB SNDR and 300 kHz BW in 130 nm CMOS B Nowacki, N Paulino, J Goes
2011 Proceedings of the ESSCIRC (ESSCIRC), 271-274, 2011
14 2011 A fully integrated and reconfigurable architecture for coherent self-testing of high speed analog-to-digital converters E Santin, LB Oliveira, B Nowacki, J Goes
IEEE Transactions on Circuits and Systems I: Regular Papers 58 (7), 1531-1541, 2011
12 2011 A low power 4th order MASH switched-capacitor ΣΔ modulator using ultra incomplete settling B Nowacki, N Paulino, J Goes
2014 IEEE International Symposium on Circuits and Systems (ISCAS), 1344-1347, 2014
9 2014 LNA, oscillator and mixer co-design for compact RF-CMOS ISM receivers J Ferreira, I Bastos, L Oliveira, JP Oliveira, T Michalak, P Pankiewicz, ...
2009 MIXDES-16th International Conference Mixed Design of Integrated …, 2009
8 2009 Design of Sigma-Delta Modulators for Analog-to-Digital Conversion Intensively Using Passive Circuits B Nowacki
Universidade Nova de Lisboa, 2016
6 2016 Analysis and the design of a first-order ΔΣ modulator using very incomplete settling B Nowacki, N Paulino, J Goes
Proceedings of the 18th International Conference Mixed Design of Integrated …, 2011
6 2011 A second-order switched-capacitor ΔΣ modulator using very incomplete settling B Nowacki, N Paulino, J Goes
2011 IEEE International Symposium of Circuits and Systems (ISCAS), 1367-1370, 2011
6 2011 A 1V 77dB-DR 72dB-SNDR 10MHz-BW 2-1 MASH CT-ΣΔ M B Nowacki
IEEE ISSCC Dig. Tech. Papers, 274-275, 2016
4 2016 Fully integrated and reconfigurable architecture for coherent self-testing of IQ ADCs E Santin, LB Oliveira, B Nowacki, J Goes
Proceedings of 2010 IEEE International Symposium on Circuits and Systems …, 2010
4 2010 A Calibration Scheme for a Sigma-Delta Modulator Using Passive Integrators IN De Brito, N Paulino, B Nowacki, T Mullane
2023 18th Conference on Ph. D Research in Microelectronics and Electronics …, 2023
3 2023 Co-design strategy approach of lna, oscillator, and mixer JP Oliveira, L Oliveira, J Ferreira, I Bastos, T Michalak, P Pankiewicz, ...
Electronics and Telecommunications Quarterly 55 (4), 585-599, 2009
2 2009 Analysis and Design of a First-Order Delta-Sigma Modulator based on Ultra Incomplete Settling and Considering Non-ideal Effects B Nowacki, N Paulino, J Goes
International Journal of Microelectronics and Computer Science 3 (4), 125-131, 2012
1 2012 A Polyphase comb filter using interlaying multiplexers for high-speed single-bit Sigma-Delta modulators S Abdollahvand, J Goes, N Paulino, B Nowacki, L Gomes
Proceedings of the 18th International Conference Mixed Design of Integrated …, 2011
1 2011 New Built-In Self Test methodology for high speed, low-power ADCs B Nowacki
FCT-UNL, 2009
2009 Outstanding Paper Award: LNA, Oscillator, and Mixer, Co-Design for Compact RF-CMOS ISM Receivers J Ferreira, I Bastos, LB Oliveira, JP Oliveira, T Michalak, P Pankiewicz, ...
2009 LNA, Oscillator and Mixer Co-Design Strategy Approach for RF-CMOS JP Oliveira, LB Oliveira, J Ferreira, I Bastos, T Michalak, P Pankiewicz, ...
Electronics and Telecommunications Quartely, 2009
2009 
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