| Simplified hardware implementation of the softmax activation function I Kouretas, V Paliouras 2019 8th international conference on modern circuits and systems …, 2019 | 118 | 2019 |
| Low-power logarithmic number system addition/subtraction and their impact on digital filters I Kouretas, C Basetas, V Paliouras IEEE Transactions on Computers 62 (11), 2196-2209, 2012 | 60 | 2012 |
| Hardware implementation of a softmax-like function for deep learning I Kouretas, V Paliouras Technologies 8 (3), 46, 2020 | 40 | 2020 |
| A low-complexity high-radix RNS multiplier I Kouretas, V Paliouras IEEE Transactions on Circuits and Systems I: Regular Papers 56 (11), 2449-2462, 2009 | 24 | 2009 |
| Low-power digital filtering based on the logarithmic number system C Basetas, I Kouretas, V Paliouras Integrated Circuit and System Design. Power and Timing Modeling …, 2007 | 23 | 2007 |
| Residue arithmetic for variation-tolerant design of multiply-add units I Kouretas, V Paliouras International Workshop on Power and Timing Modeling, Optimization and …, 2009 | 20 | 2009 |
| Logarithmic number system for deep learning I Kouretas, V Paliouras 2018 7th International Conference on Modern Circuits and Systems …, 2018 | 17 | 2018 |
| Effective capacity of fluctuating two-ray channels with arbitrary fading parameters KP Peppas, A Skrivanos, E Xenos, J Zhang, I Kouretas, S Chronopoulos 2018 IEEE 19th international workshop on signal processing advances in …, 2018 | 16 | 2018 |
| Towards a quaternion complex logarithmic number system MG Arnold, J Cowles, V Paliouras, I Kouretas 2011 IEEE 20th Symposium on Computer Arithmetic, 33-42, 2011 | 14 | 2011 |
| Fetus heart rate monitoring: A preliminary research study with remote sensing AG Skrivanos, EI Kosma, SK Chronopoulos, I Kouretas, D Dimopoulos, ... IEEE Consumer Electronics Magazine 11 (4), 32-44, 2021 | 12 | 2021 |
| Implementing the residue logarithmic number system using interpolation and cotransformation MG Arnold, V Paliouras, I Kouretas IEEE Transactions on Computers 69 (12), 1719-1732, 2019 | 10 | 2019 |
| A High-performance RNS LSTM block V Sakellariou, V Paliouras, I Kouretas, H Saleh, T Stouraitis 2022 IEEE International Symposium on Circuits and Systems (ISCAS), 1264-1268, 2022 | 9 | 2022 |
| High-radix redundant circuits for RNS modulo rn-1, rn, or rn+ 1 I Kouretas, V Paliouras IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, V-229, 2003 | 9 | 2003 |
| On Reducing the Number of Multiplications in RNS-based CNN Accelerators V Sakellariou, V Paliouras, I Kouretas, H Saleh, T Stouraitis 2021 28th IEEE International Conference on Electronics, Circuits, and …, 2021 | 8 | 2021 |
| Delay-variation-tolerant FIR filter architectures based on the residue number system I Kouretas, V Paliouras 2013 IEEE international symposium on circuits and systems (ISCAS), 2223-2226, 2013 | 8 | 2013 |
| One-hot residue logarithmic number systems MG Arnold, I Kouretas, V Paliouras, A Morgan 2019 29th International Symposium on Power and Timing Modeling, Optimization …, 2019 | 7 | 2019 |
| Simplified deep-learning-based decoders for linear block codes E Kavvousanos, V Paliouras, I Kouretas 2018 25th IEEE International Conference on Electronics, Circuits and Systems …, 2018 | 7 | 2018 |
| Residue arithmetic for designing multiply-add units in the presence of non-gaussian variation I Kouretas, V Paliouras 2012 IEEE international symposium on circuits and systems (ISCAS), 1231-1234, 2012 | 7 | 2012 |
| RNS multi-voltage low-power multiply-add unit I Kouretas, V Paliouras 2010 17th IEEE International Conference on Electronics, Circuits and Systems …, 2010 | 7 | 2010 |
| On the modulo 2n+ 1 addition and subtraction for weighted operands C Efstathiou, I Kouretas, P Kitsos Microprocessors and Microsystems 101, 104897, 2023 | 6 | 2023 |
Vassilis PaliourasProfessor, Department of Electrical and Computer Engineering, University of PatrasDirección de correo verificada de ece.upatras.gr