Impact of a spacer dielectric and a gate overlap/underlap on the device performance of a tunnel field-effect transistor A Chattopadhyay, A Mallik
IEEE Transactions on Electron Devices 58 (3), 677-683, 2011
175 2011 Tunnel field-effect transistors for analog/mixed-signal system-on-chip applications A Mallik, A Chattopadhyay
IEEE Transactions on Electron Devices 59 (4), 888-894, 2012
138 2012 Impact of halo doping on the subthreshold performance of deep-submicrometer CMOS devices and circuits for ultralow power analog/mixed-signal applications S Chakraborty, A Mallik, CK Sarkar, VR Rao
IEEE Transactions on Electron Devices 54 (2), 241-248, 2007
108 2007 Drain-dependence of tunnel field-effect transistor characteristics: The role of the channel A Mallik, A Chattopadhyay
IEEE transactions on electron devices 58 (12), 4250-4257, 2011
91 2011 Comparison of random dopant and gate-metal workfunction variability between junctionless and conventional FinFETs SM Nawaz, S Dutta, A Chattopadhyay, A Mallik
IEEE electron device letters 35 (6), 663-665, 2014
65 2014 Impact of a pocket doping on the device performance of a Schottky tunneling field-effect transistor S Guin, A Chattopadhyay, A Karmakar, A Mallik
IEEE transactions on electron devices 61 (7), 2515-2522, 2014
64 2014 Subthreshold performance of dual-material gate CMOS devices and circuits for ultralow power analog/mixed-signal applications S Chakraborty, A Mallik, CK Sarkar
IEEE transactions on electron devices 55 (3), 827-832, 2008
64 2008 Impact of a spacer–drain overlap on the characteristics of a silicon tunnel field-effect transistor based on vertical tunneling A Mallik, A Chattopadhyay, S Guin, A Karmakar
IEEE transactions on electron devices 60 (3), 935-943, 2013
59 2013 Study of InGaAs-channel MOSFETs for analog/mixed-signal system-on-chip applications S Tewari, A Biswas, A Mallik
IEEE electron device letters 33 (3), 372-374, 2012
48 2012 A subthreshold surface potential model for short-channel MOSFET taking into account the varying depth of channel depletion layer due to source and drain junctions S Baishya, A Mallik, CK Sarkar
IEEE transactions on electron devices 53 (3), 507-514, 2006
48 2006 Comparison of logic performance of CMOS circuits implemented with junctionless and inversion-mode FinFETs S Guin, M Sil, A Mallik
IEEE Transactions on Electron Devices 64 (3), 953-959, 2017
43 2017 Energy-from-waste: A triboelectric nanogenerator fabricated from waste polystyrene for energy harvesting and self-powered sensor SM Nawaz, M Saha, N Sepay, A Mallik
Nano Energy 104, 107902, 2022
42 2022 The Impact of Fringing Field on the Device Performance of a p-Channel Tunnel Field-Effect Transistor With a High- Gate Dielectric A Mallik, A Chattopadhyay
IEEE transactions on electron devices 59 (2), 277-282, 2011
42 2011 Composition-dependent nanoelectronics of amido-phenazines: non-volatile RRAM and WORM memory devices DK Maiti, S Debnath, SM Nawaz, B Dey, E Dinda, D Roy, S Ray, A Mallik, ...
Scientific reports 7 (1), 13308, 2017
40 2017 Temperature dependence of analog performance, linearity, and harmonic distortion for a ge-source tunnel FET E Datta, A Chattopadhyay, A Mallik, Y Omura
IEEE Transactions on Electron Devices 67 (3), 810-815, 2020
39 2020 Impact of different barrier layers and indium content of the channel on the analog performance of InGaAs MOSFETs S Tewari, A Biswas, A Mallik
IEEE transactions on electron devices 60 (5), 1584-1589, 2013
37 2013 MOS Devices for Low-voltage and Low-energy Applications Y Omura, A Mallik, N Matsuo
John Wiley & Sons, 2017
36 2017 Effects of device scaling on the performance of junctionless FinFETs due to gate-metal work function variability and random dopant fluctuations SM Nawaz, A Mallik
IEEE Electron Device Letters 37 (8), 958-961, 2016
34 2016 Relative study of analog performance, linearity, and harmonic distortion between junctionless and conventional SOI FinFETs at elevated temperatures E Datta, A Chattopadhyay, A Mallik
Journal of Electronic Materials 49, 3309-3316, 2020
28 2020 Comparison of gate-metal work function variability between Ge and Si p-channel FinFETs SM Nawaz, S Dutta, A Mallik
IEEE Transactions on Electron devices 62 (12), 3951-3956, 2015
26 2015