Jonathan Rose

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Vaughn BetzUniversity of TorontoDirección de correo verificada de eecg.utoronto.ca
Paul ChowProfessor of Electrical and Computer Engineering, University of TorontoDirección de correo verificada de eecg.toronto.edu
Jason LuuUniversity of TorontoDirección de correo verificada de eecg.utoronto.ca
Stephen BrownUniversity of TorontoDirección de correo verificada de eecg.toronto.edu
Alexander MarquardtElasticDirección de correo verificada de utoronto.ca
Jason AndersonProfessor of Electrical and Computer Engineering, University of TorontoDirección de correo verificada de eecg.toronto.edu
Peter JamiesonAssociate Professor of Computer Engineering, Miami UniversityDirección de correo verificada de miamioh.edu
Kenneth B KentUniversity of New BrunswickDirección de correo verificada de unb.ca
Lothar LilgeUniversity Health Network, Princess Margaret Cancer Centre, University of Toronto, medicalDirección de correo verificada de uhnresearch.ca
Steve WiltonElectrical and Computer Engineering, University of British Columbia, V6T 1Z4Dirección de correo verificada de ece.ubc.ca
Henry WongDirección de correo verificada de stuffedcow.net
Jeffrey GoedersBrigham Young UniversityDirección de correo verificada de byu.edu
Braiden BrousseauUniversity of TorontoDirección de correo verificada de mail.utoronto.ca
Abbas El GamalElectrical Engineering, Stanford UniversityDirección de correo verificada de ee.stanford.edu
Alberto Sangiovanni VincentelliProfessor of EECS, University of California, BerkeleyDirección de correo verificada de eecs.berkeley.edu
Daniel Di MatteoDirección de correo verificada de utoronto.ca
Russell TessierUniversity of MassachusettsDirección de correo verificada de umass.edu
Moshe EizenmanProfessor, Ophthalmology and Biomedical Engineering, University of TorontoDirección de correo verificada de utoronto.ca
W. James MacLeanAssistant Professor of Electrical & Computer Engineering, University of TorontoDirección de correo verificada de utoronto.ca
Martin SnelgroveCTO, Untether AIDirección de correo verificada de kapik.com

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Jonathan Rose

Professor of Electrical and Computer Engineering, University of Toronto

Dirección de correo verificada de ece.utoronto.ca - Página principal

Recent: Natural Language Processing and Software in the service of Mental Health Previous:FPGAs Architecture CAD


Título Ordenar por citas Ordenar por año Ordenar por título	Citado por Citado por	Año
Measuring the gap between FPGAs and ASICs I Kuon, J Rose Proceedings of the 2006 ACM/SIGDA 14th international symposium on Field …, 2006	1901	2006
Architecture and CAD for deep-submicron FPGAs V Betz, J Rose, A Marquardt Springer Science & Business Media, 1999	1825*	1999
VPR: A new packing, placement and routing tool for FPGA research V Betz, J Rose International Workshop on Field Programmable Logic and Applications, 213-222, 1997	1611	1997
Field-Programmable Gate Arrays S Brown, R Francis, J Rose, Z Vranesic Kluwer/Springer, ISBN 978-0-7923-9248-4, 1992	1385*	1992
FPGA architecture: Survey and challenges I Kuon, R Tessier, J Rose Foundations and Trends® in Electronic Design Automation 2 (2), 135-253, 2008	971	2008
FPGA and CPLD architectures: A tutorial S Brown, J Rose IEEE design & test of computers 13 (2), 42-57, 1996	884*	1996
The effect of LUT and cluster size on deep-submicron FPGA performance and density E Ahmed, J Rose Proceedings of the 2000 ACM/SIGDA eighth international symposium on Field …, 2000	823	2000
Architecture of field-programmable gate arrays J Rose, A El Gamal, A Sangiovanni-Vincentelli Proceedings of the IEEE 81 (7), 1013-1029, 1993	546	1993
VTR 7.0: Next generation architecture and CAD system for FPGAs J Luu, J Goeders, M Wainberg, A Somerville, T Yu, K Nasartschuk, M Nasr, ... ACM Transactions on Reconfigurable Technology and Systems (TRETS) 7 (2), 1-30, 2014	493	2014
Architecture of field-programmable gate arrays: The effect of logic block functionality on area efficiency J Rose, RJ Francis, D Lewis, P Chow IEEE Journal of Solid-State Circuits 25 (5), 1217-1225, 1990	465	1990
Chortle-crf: Fast technology mapping for lookup table-based FPGAs R Francis, J Rose, Z Vranesic Proceedings of the 28th ACM/IEEE design automation conference, 227-233, 1991	385	1991
The VTR project: architecture and CAD for FPGAs from verilog to routing J Rose, J Luu, CW Yu, O Densmore, J Goeders, A Somerville, KB Kent, ... Proceedings of the ACM/SIGDA international symposium on Field Programmable …, 2012	374	2012
Timing-driven placement for FPGAs A Marquardt, V Betz, J Rose Proceedings of the 2000 ACM/SIGDA eighth international symposium on Field …, 2000	373	2000
Using cluster-based logic blocks and timing-driven packing to improve FPGA speed and density A Marquardt, V Betz, J Rose Proceedings of the 1999 ACM/SIGDA seventh international symposium on Field …, 1999	367	1999
VPR 5.0: FPGA CAD and architecture exploration tools with single-driver routing, heterogeneity and process scaling J Luu, I Kuon, P Jamieson, T Campbell, A Ye, WM Fang, K Kent, J Rose ACM Transactions on Reconfigurable Technology and Systems (TRETS) 4 (4), 1-23, 2011	355	2011
Flexibility of interconnection structures for field-programmable gate arrays J Rose, S Brown IEEE Journal of Solid-State Circuits 26 (3), 277-282, 1991	330	1991
Chortle: A technology mapping program for lookup table-based field programmable gate arrays RJ Francis, J Rose, K Chung Proceedings of the 27th ACM/IEEE Design Automation Conference, 613-619, 1991	282	1991
The Stratix II logic and routing architecture D Lewis, E Ahmed, G Baeckler, V Betz, M Bourgeault, D Cashman, ... Proceedings of the 2005 ACM/SIGDA 13th international symposium on Field …, 2005	267	2005
FPGA routing architecture: Segmentation and buffering to optimize speed and density V Betz, J Rose Proceedings of the 1999 ACM/SIGDA seventh international symposium on Field …, 1999	253	1999
A detailed router for field-programmable gate arrays S Brown, J Rose, ZG Vranesic IEEE transactions on computer-aided design of integrated circuits and …, 1992	249	1992

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