Vassilis Paliouras

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Athanasios (Thanos) StouraitisKhalifa University, UAE, and University of Patras, GreeceDirección de correo verificada de ku.ac.ae
Ioannis KouretasUniversity of PatrasDirección de correo verificada de upatras.gr
Ahmed MahdiVassilis PaliourasDirección de correo verificada de ece.upatras.gr
Dimitrios SoudrisProfessor, Electrical & Computer Eng., National Technical Univ. of AthensDirección de correo verificada de microlab.ntua.gr
Emmanouil KavvousanosPhD Candidate, Electrical & Computer Engineering Department, University of PatrasDirección de correo verificada de ece.upatras.gr
Dimitris VordonisPhD Candidate at University of PatrasDirección de correo verificada de upnet.gr
Charis BasetasPhD candidate, National Technical University of AthensDirección de correo verificada de central.ntua.gr
Giorgos DimitrakopoulosProfessor, ECE, Democritus University of ThraceDirección de correo verificada de ee.duth.gr
Michael BirbasAssociate Professor at Dept of Electrical and Computer Engineering of Patras UniversityDirección de correo verificada de ece.upatras.gr
Ioannis ParaskevakosResearch Software Engineer, Princeton UniversityDirección de correo verificada de princeton.edu
John CowlesProfessor of Computer Science, University of WyomingDirección de correo verificada de uwyo.edu
Apostolos P. FournarisResearch Director, Industrial Systems Institute, R.C. ATHENADirección de correo verificada de isi.gr
Panagiotis VouzisCarnegie Mellon UniversityDirección de correo verificada de cmu.edu
Alexios BirbasUniversity Of PatrasDirección de correo verificada de ece.upatras.gr
Konstantinos N. VoudourisProfessor of Wireless Communications, University of West Attica, Athens, GreeceDirección de correo verificada de uniwa.gr
Grigorios KalivasAssociate Professor of Electrical adn Computer Engineering, Un. of PatrasDirección de correo verificada de ece.upatras.gr
Ioannis (John) KorinthiosResearcher, University of ThessalyDirección de correo verificada de uth.gr
Rodoula MakriInstitute of Communications & Computer Systems - National Technical University of AthensDirección de correo verificada de esd.ece.ntua.gr
Evangelos HaleplidisUniversity of Piraeus - Department of Digital SystemsDirección de correo verificada de unipi.gr
Odysseas KoufopavlouProfessor of Electrical and Computer Engineering, University of PatrasDirección de correo verificada de ece.upatras.gr

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Vassilis Paliouras

Professor, Department of Electrical and Computer Engineering, University of Patras

Dirección de correo verificada de ece.upatras.gr - Página principal

integrated systems design and implementation of signal processing systems error correction computer arithmetic low power


Título Ordenar por citas Ordenar por año Ordenar por título	Citado por Citado por	Año
Considering the alternatives in low-power design T Stouraitis, V Paliouras IEEE Circuits and Devices Magazine 17 (4), 22-29, 2001	119	2001
Simplified hardware implementation of the softmax activation function I Kouretas, V Paliouras 2019 8th international conference on modern circuits and systems …, 2019	118	2019
Low-power properties of the logarithmic number system V Paliouras, T Stouraitis Proceedings 15th IEEE Symposium on Computer Arithmetic. ARITH-15 2001, 229-236, 2001	95	2001
Low-power logarithmic number system addition/subtraction and their impact on digital filters I Kouretas, C Basetas, V Paliouras IEEE Transactions on Computers 62 (11), 2196-2209, 2012	60	2012
A reconfigurable LDPC decoder optimized for 802.11 n/ac applications I Tsatsaragkos, V Paliouras IEEE Transactions on Very Large Scale Integration (VLSI) Systems 26 (1), 182-195, 2017	43	2017
Multifunction architectures for RNS processors V Paliouras, T Stouraitis IEEE Transactions on Circuits and Systems II: Analog and Digital Signal …, 1999	41	1999
Hardware implementation of a softmax-like function for deep learning I Kouretas, V Paliouras Technologies 8 (3), 46, 2020	40	2020
A VLSI design methodology for RNS full adder-based inner product architectures DJ Soudris, V Paliouras, T Stouraitis, CE Goutis IEEE Transactions on Circuits and Systems II: Analog and Digital Signal …, 1997	39	1997
A low-complexity combinatorial RNS multiplier V Paliouras, K Karagianni, T Stouraitis IEEE Transactions on Circuits and Systems II: Analog and Digital Signal …, 2001	38	2001
A floating-point processor for fast and accurate sine/cosine evaluation V Paliouras, K Karagianni, T Stouraitis IEEE Transactions on Circuits and Systems II: Analog and Digital Signal …, 2000	37	2000
Logarithmic number system for low-power arithmetic V Paliouras, T Stouraitis Integrated Circuit Design: Power and Timing Modeling, Optimization and …, 2000	35	2000
A novel algorithm for accurate logarithmic number system subtraction V Paliouras, T Stouraitis 1996 IEEE International Symposium on Circuits and Systems. Circuits and …, 1996	34	1996
A low complexity-high throughput QC-LDPC encoder A Mahdi, V Paliouras IEEE transactions on signal processing 62 (10), 2696-2708, 2014	31	2014
A multirate fully parallel LDPC encoder for the IEEE 802.11 n/ac/ax QC-LDPC codes based on reduced complexity XOR trees A Mahdi, N Kanistras, V Paliouras IEEE Transactions on Very Large Scale Integration (VLSI) Systems 29 (1), 51-64, 2020	30	2020
Novel high-radix residue number system architectures V Paliouras, T Stouraitis IEEE Transactions on Circuits and Systems II: Analog and Digital Signal …, 2000	30	2000
Approximate algorithms for identifying minima on min-sum LDPC decoders and their hardware implementation I Tsatsaragkos, V Paliouras IEEE Transactions on Circuits and Systems II: Express Briefs 62 (8), 766-770, 2015	29	2015
LDPC encoding and decoding techniques I Tsatsaragkos, A Mahdi, N Kanistras, V Paliouras US Patent 8,739,001, 2014	29	2014
Novel high-radix residue number system multipliers and adders V Paliouras, T Stouraitis 1999 IEEE International Symposium on Circuits and Systems (ISCAS) 1, 451-454, 1999	28	1999
A low-power termination criterion for iterative LDPC code decoders G Glikiotis, V Paliouras IEEE Workshop on Signal Processing Systems Design and Implementation, 2005 …, 2005	25	2005
A flexible high-throughput hardware architecture for a gaussian noise generator I Paraskevakos, V Paliouras 2011 IEEE International Conference on Acoustics, Speech and Signal …, 2011	24	2011

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