Giorgos Dimitrakopoulos

Citado por

	Total	Desde 2020
Citas	1625	675
Índice h	21	14
Índice i10	39	22

160

120

20052006200720082009201020112012201320142015201620172018201920202021202220232024202513 15 28 23 35 35 44 54 67 65 103 101 126 106 111 99 134 139 135 156 12

Acceso público

Ver todo

6 artículos

0 artículos

disponibles

no disponibles

Basado en requisitos de financiación

Coautores

Chrysostomos NicopoulosAssociate Professor, Department of ECE, University of CyprusDirección de correo verificada de ucy.ac.cy
Anastasios PsarrasSoC Design Engineer @ Axelera AIDirección de correo verificada de ee.duth.gr
Dimitris NikolosProfessor, Computer Engineering & Informatics Dept, University of PatrasDirección de correo verificada de ceid.upatras.gr
Ioannis SeitanidisSynopsysDirección de correo verificada de synopsys.com
Dionysios FilippasPh.D Student, Democritus University of ThraceDirección de correo verificada de ee.duth.gr
Haridimos T. VergosProfessor, Computer Engineering & Informatics Dept, University of PatrasDirección de correo verificada de ceid.upatras.gr
Georgios Ch. SirakoulisProfessor, Democritus University of Thrace, GreeceDirección de correo verificada de ee.duth.gr
Christodoulos PeltekisPhD Student, Democritus University of ThraceDirección de correo verificada de ee.duth.gr
Constantinos EfstathiouProfessor, Dept. of Informatics and Computer Engineering, University of West AtticaDirección de correo verificada de uniwa.gr
Emmanouil KalligerosUniversity of the AegeanDirección de correo verificada de aegean.gr
Apostolos StefanidisDemocritus University of ThraceDirección de correo verificada de ee.duth.gr
David ChinnerySiemens EDADirección de correo verificada de mentor.com
Nikolaos ChrysosFoundation For Research & Technology (FORTH) -- HellasDirección de correo verificada de ics.forth.gr
Junghee LeeAssistant Professor of School of Cyber Security, Korea UniversityDirección de correo verificada de korea.ac.kr
Yiannakis (Yanos) SazeidesUniversity of CyprusDirección de correo verificada de cs.ucy.ac.cy
Jose FlichAssociate Professor, Technical University of ValenciaDirección de correo verificada de disca.upv.es
Vassilis PaliourasProfessor, Department of Electrical and Computer Engineering, University of PatrasDirección de correo verificada de ece.upatras.gr
Iosif-Angelos FyrigosDemocritus University of ThraceDirección de correo verificada de ee.duth.gr
Sorin CotofanaQuantum & Computer Engineering, Delft University of TechnologyDirección de correo verificada de tudelft.nl
Dimitris NikolosDirección de correo verificada de upatras.gr

Seguir

Giorgos Dimitrakopoulos

Professor, ECE, Democritus University of Thrace

Dirección de correo verificada de ee.duth.gr - Página principal

VLSI Integrated Circuits Electronic Design Automation Computer Architecture Computer Arithmetic


Título Ordenar por citas Ordenar por año Ordenar por título	Citado por Citado por	Año
High-speed parallel-prefix VLSI Ling adders G Dimitrakopoulos, D Nikolos IEEE Transactions on Computers 54 (2), 225-231, 2005	216	2005
Efficient diminished-1 modulo 2/sup n/+ 1 multipliers C Efstathiou, HT Vergos, G Dimitrakopoulos, D Nikolos IEEE Transactions on Computers 54 (4), 491-496, 2005	97	2005
Microarchitecture of Network-on-chip Routers G Dimitrakopoulos, A Psarras, I Seitanidis Springer, 2015	85	2015
On modulo 2^ n+ 1 adder design HT Vergos, G Dimitrakopoulos IEEE transactions on computers 61 (2), 173-186, 2010	85	2010
Low-power leading-zero counting and anticipation logic for high-speed floating point units G Dimitrakopoulos, K Galanopoulos, C Mavrokefalidis, D Nikolos IEEE transactions on very large scale integration (VLSI) systems 16 (7), 837-850, 2008	72	2008
Fast arbiters for on-chip network switches G Dimitrakopoulos, N Chrysos, K Galanopoulos 2008 IEEE International Conference on Computer Design, 664-670, 2008	65	2008
The fast evolving landscape of on-chip communication: Selected future challenges and research avenues D Bertozzi, G Dimitrakopoulos, J Flich, S Sonntag Design Automation for Embedded Systems 19, 59-76, 2015	61	2015
ShortPath: A network-on-chip router with fine-grained pipeline bypassing A Psarras, I Seitanidis, C Nicopoulos, G Dimitrakopoulos IEEE Transactions on Computers 65 (10), 3136-3147, 2016	49	2016
New architectures for modulo 2n-1 adders G Dimitrakopoulos, DG Nikolos, HT Vergos, D Nikolos, C Efstathiou 2005 12th IEEE International Conference on Electronics, Circuits and Systems …, 2005	48	2005
RISC-V²: A Scalable RISC-V Vector Processor K Patsidis, C Nicopoulos, GC Sirakoulis, G Dimitrakopoulos 2020 IEEE International Symposium on Circuits and Systems (ISCAS), 1-5, 2020	46	2020
PhaseNoC: TDM scheduling at the virtual-channel level for efficient network traffic isolation A Psarras, I Seitanidis, C Nicopoulos, G Dimitrakopoulos 2015 Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2015	44	2015
ElastiStore: Flexible elastic buffering for virtual-channel-based networks on chip I Seitanidis, A Psarras, K Chrysanthou, C Nicopoulos, G Dimitrakopoulos IEEE Transactions on Very Large Scale Integration (VLSI) Systems 23 (12 …, 2015	38	2015
Elastistore: An elastic buffer architecture for network-on-chip routers I Seitanidis, A Psarras, G Dimitrakopoulos, C Nicopoulos 2014 Design, Automation & Test in Europe Conference & Exhibition (DATE), 1-6, 2014	33	2014
PhaseNoC: Versatile network traffic isolation through TDM-scheduled virtual channels A Psarras, J Lee, I Seitanidis, C Nicopoulos, G Dimitrakopoulos IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2015	31	2015
A low-cost synthesizable RISC-V dual-issue processor core leveraging the compressed Instruction Set Extension K Patsidis, D Konstantinou, C Nicopoulos, G Dimitrakopoulos Microprocessors and Microsystems 61, 1-10, 2018	29	2018
Merged switch allocation and traversal in network-on-chip switches G Dimitrakopoulos, E Kalligeros, K Galanopoulos IEEE Transactions on Computers 62 (10), 2001-2012, 2012	28	2012
Networks-on-chip with double-data-rate links A Psarras, S Moisidis, C Nicopoulos, G Dimitrakopoulos IEEE Transactions on Circuits and Systems I: Regular Papers 64 (12), 3103-3114, 2017	24	2017
A low-power network-on-chip architecture for tile-based chip multi-processors A Psarras, J Lee, P Mattheakis, C Nicopoulos, G Dimitrakopoulos Proceedings of the 26th edition on Great Lakes Symposium on VLSI, 335-340, 2016	24	2016
Low-cost online convolution checksum checker D Filippas, N Margomenos, N Mitianoudis, C Nicopoulos, ... IEEE Transactions on Very Large Scale Integration (VLSI) Systems 30 (2), 201-212, 2021	23	2021
LP-NUCA: Networks-in-cache for high-performance low-power embedded processors DS Gracia, G Dimitrakopoulos, TM Arnal, MGH Katevenis, VV Yúfera IEEE Transactions on Very Large Scale Integration (VLSI) Systems 20 (8 …, 2011	23	2011

El sistema no puede realizar la operación en estos momentos. Inténtalo de nuevo más tarde.

Artículos 1–20

Citas por año

Citas duplicadas

Citas combinadas

Añadir coautoresCoautores

Seguir

Citado por

Coautores