| Towards spike-based machine intelligence with neuromorphic computing K Roy, A Jaiswal, P Panda Nature 575 (7784), 607-617, 2019 | 1796 | 2019 |
| X-SRAM: Enabling in-memory Boolean computations in CMOS static random access memories A Agrawal, A Jaiswal, C Lee, K Roy IEEE Transactions on Circuits and Systems I: Regular Papers 65 (12), 4219-4232, 2018 | 331 | 2018 |
| 8T SRAM cell as a multibit dot-product engine for beyond von Neumann computing A Jaiswal, I Chakraborty, A Agrawal, K Roy IEEE Transactions on Very Large Scale Integration (VLSI) Systems 27 (11 …, 2019 | 197 | 2019 |
| Pathways to efficient neuromorphic computing with non-volatile memory technologies I Chakraborty, A Jaiswal, AK Saha, SK Gupta, K Roy Applied Physics Reviews 7 (2), 2020 | 160 | 2020 |
| Xcel-RAM: Accelerating binary neural networks in high-throughput SRAM compute arrays A Agrawal, A Jaiswal, D Roy, B Han, G Srinivasan, A Ankit, K Roy IEEE Transactions on Circuits and Systems I: Regular Papers 66 (8), 3064-3076, 2019 | 131 | 2019 |
| IMAC: In-memory multi-bit multiplication and accumulation in 6T SRAM array M Ali, A Jaiswal, S Kodge, A Agrawal, I Chakraborty, K Roy IEEE Transactions on Circuits and Systems I: Regular Papers 67 (8), 2521-2531, 2020 | 126 | 2020 |
| In-memory low-cost bit-serial addition using commodity DRAM technology MF Ali, A Jaiswal, K Roy IEEE Transactions on Circuits and Systems I: Regular Papers 67 (1), 155-165, 2019 | 124 | 2019 |
| Proposal for a leaky-integrate-fire spiking neuron based on magnetoelectric switching of ferromagnets A Jaiswal, S Roy, G Srinivasan, K Roy IEEE Transactions on Electron Devices 64 (4), 1818-1824, 2017 | 91 | 2017 |
| Stochastic spiking neural networks enabled by magnetic tunnel junctions: From nontelegraphic to telegraphic switching regimes CM Liyanagedera, A Sengupta, A Jaiswal, K Roy Physical Review Applied 8 (6), 064017, 2017 | 81 | 2017 |
| Stochastic spiking neural networks enabled by magnetic tunnel junctions: From nontelegraphic to telegraphic switching regimes CM Liyanagedera, A Sengupta, A Jaiswal, K Roy Physical Review Applied 8 (6), 064017, 2017 | 81 | 2017 |
| Ising computation based combinatorial optimization using spin-Hall effect (SHE) induced stochastic magnetization reversal Y Shim, A Jaiswal, K Roy Journal of applied physics 121 (19), 193902, 2017 | 67 | 2017 |
| Ising computation based combinatorial optimization using spin-Hall effect (SHE) induced stochastic magnetization reversal Y Shim, A Jaiswal, K Roy Journal of applied physics 121 (19), 193902, 2017 | 67 | 2017 |
| Comprehensive scaling analysis of current induced switching in magnetic memories based on in-plane and perpendicular anisotropies A Jaiswal, X Fong, K Roy IEEE Journal on Emerging and Selected Topics in Circuits and Systems 6 (2 …, 2016 | 61 | 2016 |
| Energy efficient neural computing: A study of cross-layer approximations SS Sarwar, G Srinivasan, B Han, P Wijesinghe, A Jaiswal, P Panda, ... IEEE Journal on Emerging and Selected Topics in Circuits and Systems 8 (4 …, 2018 | 54 | 2018 |
| Significance driven hybrid 8T-6T SRAM for energy-efficient synaptic storage in artificial neural networks G Srinivasan, P Wijesinghe, SS Sarwar, A Jaiswal, K Roy 2016 Design, Automation & Test in Europe Conference & Exhibition (DATE), 151-156, 2016 | 48 | 2016 |
| A processing-in-pixel-in-memory paradigm for resource-constrained tinyml applications G Datta, S Kundu, Z Yin, RT Lakkireddy, J Mathai, AP Jacob, PA Beerel, ... Scientific Reports 12 (1), 14396, 2022 | 44 | 2022 |
| IMPULSE: A 65-nm digital compute-in-memory macro with fused weights and membrane potential for spike-based sequential learning tasks A Agrawal, M Ali, M Koo, N Rathi, A Jaiswal, K Roy IEEE Solid-State Circuits Letters 4, 137-140, 2021 | 38 | 2021 |
| ACE-SNN: Algorithm-hardware co-design of energy-efficient & low-latency deep spiking neural networks for 3d image recognition G Datta, S Kundu, AR Jaiswal, PA Beerel Frontiers in neuroscience 16, 815258, 2022 | 34 | 2022 |
| Modeling and design space exploration for bit-cells based on voltage-assisted switching of magnetic tunnel junctions S Sharmin, A Jaiswal, K Roy IEEE Transactions on Electron Devices 63 (9), 3493-3500, 2016 | 34 | 2016 |
| i-SRAM: Interleaved Wordlines for Vector Boolean Operations Using SRAMs A Jaiswal, A Agrawal, MF Ali, S Sharmin, K Roy IEEE Transactions on Circuits and Systems I: Regular Papers 67 (12), 4651-4659, 2020 | 30 | 2020 |
Kaushik RoyProfessor of Electrical and Computer Engineering, Purdue UniversityVahvistettu sähköpostiosoite verkkotunnuksessa purdue.edu
