Seuraa
Cláudio Machado Diniz
Cláudio Machado Diniz
Universidade Federal do Rio Grande do Sul
Vahvistettu sähköpostiosoite verkkotunnuksessa inf.ufrgs.br - Kotisivu
Nimike
Viittaukset
Viittaukset
Vuosi
Power-efficient sum of absolute differences hardware architecture using adder compressors for integer motion estimation design
B Silveira, G Paim, B Abreu, M Grellert, CM Diniz, EAC da Costa, S Bampi
IEEE Transactions on Circuits and Systems I: Regular Papers 64 (12), 3126-3137, 2017
912017
Design methodology to explore hybrid approximate adders for energy-efficient image and video processing accelerators
LB Soares, MMA da Rosa, CM Diniz, EAC da Costa, S Bampi
IEEE Transactions on Circuits and Systems I: Regular Papers 66 (6), 2137-2150, 2019
742019
A reconfigurable hardware architecture for fractional pixel interpolation in high efficiency video coding
CM Diniz, M Shafique, S Bampi, J Henkel
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2014
392014
High-throughput interpolation hardware architecture with coarse-grained reconfigurable datapaths for HEVC
CM Diniz, M Shafique, S Bampi, J Henkel
2013 IEEE International Conference on Image Processing, 2091-2095, 2013
332013
Parallelization of full search motion estimation algorithm for parallel and distributed platforms
E Monteiro, B Vizzotto, C Diniz, M Maule, B Zatt, S Bampi
International Journal of Parallel Programming 42, 239-264, 2014
302014
Exploring the use of parallel prefix adder topologies into approximate adder circuits
M Macedo, L Soares, B Silveira, CM Diniz, EAC da Costa
2017 24th IEEE International Conference on Electronics, Circuits and Systems …, 2017
292017
A deblocking filter hardware architecture for the high efficiency video coding standard
CM Diniz, M Shafique, FV Dalcin, S Bampi, J Henkel
2015 Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2015
262015
Synthesis and comparison of low-power high-throughput architectures for SAD calculation
FL Walter, CM Diniz, S Bampi
Analog Integrated Circuits and Signal Processing 73, 873-884, 2012
262012
SATD hardware architecture based on 8× 8 Hadamard Transform for HEVC encoder
E Silveira, C Diniz, MB Fonseca, E Costa
2015 IEEE International Conference on Electronics, Circuits, and Systems …, 2015
242015
A high throughput H. 264/AVC intra-frame encoding loop architecture for HD1080p
C Diniz, B Zatt, C Thiele, A Susin, S Bampi, F Sampaio, D Palomino, ...
2011 IEEE International Symposium of Circuits and Systems (ISCAS), 579-582, 2011
232011
Real-time block matching motion estimation onto GPGPU
E Monteiro, M Maule, F Sampaio, C Diniz, B Zatt, S Bampi
2012 19th IEEE International Conference on Image Processing, 1693-1696, 2012
192012
Applying CUDA architecture to accelerate full search block matching algorithm for high performance motion estimation in video encoding
E Monteiro, B Vizzotto, B Zatt, S Bampi
2011 23rd International Symposium on Computer Architecture and High …, 2011
182011
Hardware architecture for the regular interpolation filter of the AV1 video coding standard
D Freitas, R da Silva, Í Siqueira, CM Diniz, RAL Reis, M Grellert
2020 28th European Signal Processing Conference (EUSIPCO), 560-564, 2021
142021
Approximate subtractor operator for low-power video coding hardware accelerators
R Ferreira, M Leme, M Corrêa, L Agostini, C Diniz, B Zatt
2019 26th IEEE International Conference on Electronics, Circuits and Systems …, 2019
142019
Using adder and subtractor compressors to sum of absolute transformed differences architecture for low-power video encoding
B Silveira, B Abreu, G Paim, M Grellert, R Ferreira, C Diniz, E Costa, ...
2017 24th IEEE International Conference on Electronics, Circuits and Systems …, 2017
142017
Homogeneity and distortion-based intra mode decision architecture for H. 264/AVC
G Corrêa, C Diniz, S Bampi, D Palomino, R Porto, L Agostini
2010 17th IEEE International Conference on Electronics, Circuits and Systems …, 2010
142010
Low power SATD architecture employing multiple sizes Hadamard transforms and adder compressors
B Silveira, R Ferreira, G Paim, C Diniz, E Costa
2017 15th IEEE international new circuits and systems conference (NEWCAS …, 2017
132017
A real time H. 264/AVC intra frame prediction hardware architecture for HDTV 1080P video
CM Diniz, B Zatt, L Agostini, A Susin, S Bampi
2009 IEEE international conference on multimedia and expo, 1138-1141, 2009
132009
A novel pruned-based algorithm for energy-efficient SATD operation in the HEVC coding
LB Soares, CM Diniz, EAC da Costa, S Bampi
2016 29th Symposium on Integrated Circuits and Systems Design (SBCCI), 1-6, 2016
122016
A pipelined 8x8 2-D forward DCT hardware architecture for H. 264/AVC High profile encoder
TL da Silva, CM Diniz, JA Vortmann, LV Agostini, AA Susin, S Bampi
Advances in Image and Video Technology: Second Pacific Rim Symposium, PSIVT …, 2007
122007
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Artikkelit 1–20