| Design for ReRAM-based main-memory architectures M Jagasivamani, C Walden, D Singh, L Kang, S Li, M Asnaashari, ... Proceedings of the International Symposium on Memory Systems, 342-350, 2019 | 15 | 2019 |
| Memory-systems challenges in realizing monolithic computers M Jagasivamani, C Walden, D Singh, L Kang, S Li, M Asnaashari, ... Proceedings of the International Symposium on Memory Systems, 98-104, 2018 | 12 | 2018 |
| Monolithically integrating non-volatile main memory over the last-level cache C Walden, D Singh, M Jagasivamani, S Li, L Kang, M Asnaashari, ... ACM Transactions on Architecture and Code Optimization (TACO) 18 (4), 1-26, 2021 | 9 | 2021 |
| Analyzing the Monolithic Integration of a ReRAM-based Main Memory into a CPU's Die M Jagasivamani, C Walden, D Singh, L Kang, S Li, M Asnaashari, ... IEEE Micro 39 (6), 64-72, 2019 | 7 | 2019 |
| Tileable monolithic ReRAM memory design M Jagasivamani, C Walden, D Singh, L Kang, M Asnaashari, S Dubois, ... 2020 IEEE Symposium in Low-Power and High-Speed Chips (COOL CHIPS), 1-3, 2020 | 5 | 2020 |
| MORSE: Memory Overwrite Time Guided Soft Writes to Improve ReRAM Energy and Endurance D Singh, D Yeung Proceedings of the 2024 International Conference on Parallel Architectures …, 2024 | 1 | 2024 |
| SRTP: Predicting Store Reuse Time to Improve ReRAM Energy and Endurance D Singh University of Maryland, College Park, 2022 | | 2022 |
| Design and Evaluation of Monolithic Computers Implemented Using Crossbar ReRAM M Jagasivamani, C Walden, D Singh, S Li, L Kang, M Asnaashari, ... | | 2019 |
| Memory-System Design Challenges in Realizing Monolithic Computers M Jagasivamani, C Walden, D Singh, L Kang, S Li, M Asnaashari, ... | | 2018 |
Donald YeungProfessor of Electrical & Computer Engineering, University of Maryland at College ParkAdresse e-mail validée de umd.edu
