| A 25 Gb/s, 4.4 V-Swing, AC-Coupled Ring Modulator-Based WDM Transmitter with Wavelength Stabilization in 65 nm CMOS H Li, Z Xuan, A Titriku, C Li, K Yu, B Wang, A Shafik, N Qi, Y Liu, R Ding, ... IEEE Journal of Solid-State Circuits 50 (12), 3145-3159, 2015 | 136 | 2015 |
| A 3-D-Integrated Silicon Photonic Microring-Based 112-Gb/s PAM-4 Transmitter With Nonlinear Equalization and Thermal Control H Li, G Balamurugan, T Kim, MN Sakib, R Kumar, H Rong, J Jaussi, ... IEEE Journal of Solid-State Circuits 56 (1), 19-29, 2020 | 90 | 2020 |
| A 112 Gb/s PAM4 silicon photonics transmitter with microring modulator and CMOS driver H Li, G Balamurugan, M Sakib, J Sun, J Driscoll, R Kumar, H Jayatilleka, ... Journal of Lightwave Technology 38 (1), 131-138, 2020 | 86 | 2020 |
| A 112 Gb/s PAM4 Linear TIA with 0.96 pJ/bit Energy Efficiency in 28 nm CMOS H Li, G Balamurugan, J Jaussi, B Casper ESSCIRC 2018-IEEE 44th European Solid State Circuits Conference (ESSCIRC …, 2018 | 73 | 2018 |
| A 25 Gb/s Hybrid-Integrated Silicon Photonic Source-Synchronous Receiver With Microring Wavelength Stabilization K Yu, C Li, H Li, A Titriku, A Shafik, B Wang, Z Wang, R Bai, CH Chen, ... IEEE Journal of Solid-State Circuits 51 (9), 2129-2141, 2016 | 67 | 2016 |
| A 112 Gb/s PAM4 transmitter with silicon photonics microring modulator and CMOS driver H Li, G Balamurugan, M Sakib, J Sun, J Driscoll, R Kumar, H Jayatilleka, ... 2019 Optical Fiber Communications Conference and Exhibition (OFC), 1-3, 2019 | 52 | 2019 |
| Silicon Photonic Microring-Based 4× 112 Gb/s WDM Transmitter With Photocurrent-Based Thermal Control in 28-nm CMOS J Sharma, Z Xuan, H Li, T Kim, R Kumar, MN Sakib, CM Hsu, C Ma, ... IEEE Journal of Solid-State Circuits 57 (4), 1187-1198, 2021 | 49 | 2021 |
| Co-Design and demonstration of a 25-Gb/s silicon-photonic Mach–Zehnder modulator with a CMOS-based high-swing driver N Qi, X Xiao, S Hu, X Li, H Li, L Liu, Z Li, N Wu, PY Chiang IEEE Journal of Selected Topics in Quantum Electronics 22 (6), 131-140, 2016 | 47 | 2016 |
| 22.4 A 24Gb/s 0.71 pJ/b Si-photonic source-synchronous receiver with adaptive equalization and microring wavelength stabilization K Yu, H Li, C Li, A Titriku, A Shafik, B Wang, Z Wang, R Bai, CH Chen, ... 2015 IEEE International Solid-State Circuits Conference-(ISSCC) Digest of …, 2015 | 43 | 2015 |
| A 100-Gb/s PAM-4 Optical Receiver With 2-Tap FFE and 2-Tap Direct-Feedback DFE in 28-nm CMOS H Li, CM Hsu, J Sharma, J Jaussi, G Balamurugan IEEE Journal of Solid-State Circuits 57 (1), 44-53, 2021 | 41 | 2021 |
| 22.6 A 25Gb/s 4.4 V-swing AC-coupled Si-photonic microring transmitter with 2-tap asymmetric FFE and dynamic thermal tuning in 65nm CMOS H Li, Z Xuan, A Titriku, C Li, K Yu, B Wang, A Shafik, N Qi, Y Liu, R Ding, ... 2015 IEEE International Solid-State Circuits Conference-(ISSCC) Digest of …, 2015 | 36 | 2015 |
| An 8–16 Gb/s, 0.65–1.05 pJ/b, voltage-mode transmitter with analog impedance modulation equalization and sub-3 ns power-state transitioning YH Song, HW Yang, H Li, PY Chiang, S Palermo IEEE Journal of Solid-State Circuits 49 (11), 2631-2643, 2014 | 32 | 2014 |
| A 25gb/s, 520mw, 6.4 Vpp silicon-photonic Mach-Zehnder modulator with distributed driver in CMOS N Qi, X Li, H Li, X Xiao, L Wang, Z Li, Z Gao, Y Yu, M Moyal, P Chiang Optical fiber communication conference, W1B. 3, 2015 | 31 | 2015 |
| A 128 Gb/s, 11.2 mW Single-Ended PAM4 Linear TIA With 2.7 μArms Input Noise in 22 nm FinFET CMOS S Daneshgar, H Li, T Kim, G Balamurugan IEEE Journal of Solid-State Circuits 57 (5), 1397-1408, 2022 | 25 | 2022 |
| 12.1 A 3D-Integrated Microring-Based 112Gb/s PAM-4 Silicon-Photonic Transmitter with Integrated Nonlinear Equalization and Thermal Control H Li, G Balamurugan, M Sakib, R Kumar, H Jayatilleka, H Rong, J Jaussi, ... 2020 IEEE International Solid-State Circuits Conference-(ISSCC), 208-210, 2020 | 23 | 2020 |
| A Robust Energy/Area-Efficient Forwarded-Clock Receiver With All-Digital Clock and Data Recovery in 28-nm CMOS for High-Density Interconnects S Chen, H Li, Chiang, Patrick Yin IEEE Transactions on Very Large Scale Integration (VLSI) Systems 24 (2), 578-586, 2016 | 23 | 2016 |
| A 0.8 V, 560fJ/bit, 14Gb/s injection-locked receiver with input duty-cycle distortion tolerable edge-rotating 5/4X sub-rate CDR in 65nm CMOS H Li, S Chen, L Yang, R Bai, W Hu, FY Zhong, S Palermo, PY Chiang 2014 Symposium on VLSI Circuits Digest of Technical Papers, 1-2, 2014 | 23 | 2014 |
| 11.6 A 100Gb/s-8.3 dBm-Sensitivity PAM-4 Optical Receiver with Integrated TIA, FFE and Direct-Feedback DFE in 28nm CMOS H Li, J Sharma, CM Hsu, G Balamurugan, J Jaussi 2021 IEEE International Solid-State Circuits Conference (ISSCC) 64, 190-192, 2021 | 22 | 2021 |
| Photonic apparatus with bias control to provide substantially constant responsivity of a photodetector G Balamurugan, H Rong, MN Sakib, H Li US Patent 11,137,283, 2021 | 20 | 2021 |
| Energy efficiency comparisons of NRZ and PAM4 modulation for ring-resonator-based silicon photonic links B Wang, K Yu, H Li, PY Chiang, S Palermo 2015 IEEE 58th International Midwest Symposium on Circuits and Systems …, 2015 | 19 | 2015 |
Patrick ChiangProfessor of Electrical and Computer Engineering, Fudan UniversityAdresse e-mail validée de fudan.edu.cn