| Analogue two-dimensional semiconductor electronics DK Polyushkin, S Wachter, L Mennel, M Paur, M Paliy, G Iannaccone, ... Nature Electronics 3 (8), 486-491, 2020 | 110 | 2020 |
| Low-Power Artificial Neural Network Perceptron Based on Monolayer MoS2 G Migliato Marega, Z Wang, M Paliy, G Giusi, S Strangio, F Castiglione, ... ACS nano 16 (3), 3684-3694, 2022 | 37 | 2022 |
| Analog vector-matrix multiplier based on programmable current mirrors for neural network integrated circuits M Paliy, S Strangio, P Ruiu, T Rizzo, G Iannaccone IEEE Access 8, 203525-203537, 2020 | 28 | 2020 |
| A portable class of 3‐transistor current references with low‐power sub‐0.5 V operation F Crupi, R De Rose, M Paliy, M Lanuzza, M Perna, G Iannaccone International Journal of Circuit Theory and Applications 46 (4), 779-795, 2018 | 21 | 2018 |
| Design criteria of high temperature integrated circuits using standard SOI CMOS process up to 300° C C Sbrana, A Catania, M Paliy, S Di Pascoli, S Strangio, M Macucci, ... IEEE Access, 2024 | 6 | 2024 |
| Assessment of two-dimensional materials-based technology for analog neural networks M Paliy, S Strangio, P Ruiu, G Iannaccone IEEE Journal on Exploratory Solid-State Computational Devices and Circuits 7 …, 2021 | 5 | 2021 |
| The case for hybrid analog neuromorphic chips based on silicon and 2D materials G Iannaccone, T Rizzo, M Paliy, S Sfrangio 2023 International Electron Devices Meeting (IEDM), 1-4, 2023 | 1 | 2023 |
| Single-poly floating-gate memory cell options for analog neural networks M Paliy, T Rizzo, P Ruiu, S Strangio, G Iannaccone Solid-State Electronics 185, 108062, 2021 | 1 | 2021 |
| Design of analog circuits for deep neural networks with CMOS technology and 2D materials M PALIY | | 2021 |
| Design of a 3T current reference for low-voltage, low-power operation R De Rose, F Crupi, M Paliy, M Lanuzza, G Iannaccone 2018 International Conference on IC Design & Technology (ICICDT), 13-16, 2018 | | 2018 |
