A broadband noise-canceling CMOS LNA for 3.1–10.6-GHz UWB receivers CF Liao, SI Liu
IEEE Journal of Solid-State Circuits 42 (2), 329-339, 2007
609 2007 CMOS differential difference current conveyors and their applications W Chiu, SI Liu, HW Tsao, JJ Chen
IEE Proceedings-Circuits, Devices and Systems 143 (2), 91-96, 1996
555 1996 An Ultra-Wide-Band 0.4–10-GHz LNA in 0.18- KH Chen, JH Lu, BJ Chen, SI Liu
IEEE Transactions on Circuits and Systems II: Express Briefs 54 (3), 217-221, 2007
260 2007 Miniature 3-D inductors in standard CMOS process CC Tang, CH Wu, SI Liu
IEEE Journal of solid-state circuits 37 (4), 471-480, 2002
235 2002 A wide-range delay-locked loop with a fixed latency of one clock cycle HH Chang, JW Lin, CY Yang, SI Liu
IEEE journal of solid-state circuits 37 (8), 1021-1027, 2002
229 2002 A CMOS pulse-shrinking delay element for time interval measurement P Chen, SL Liu, J Wu
IEEE Transactions on Circuits and Systems II: Analog and digital signal …, 2000
206 2000 CMOS wideband amplifiers using multiple inductive-series peaking technique CH Wu, CH Lee, WS Chen, SI Liu
IEEE journal of solid-state Circuits 40 (2), 548-552, 2005
198 2005 A 40–550 MHz harmonic-free all-digital delay-locked loop using a variable SAR algorithm RJ Yang, SI Liu
IEEE Journal of solid-state circuits 42 (2), 361-373, 2007
197 2007 New dynamic flip-flops for high-speed dual-modulus prescaler CY Yang, GK Dehng, JM Hsu, SI Liu
IEEE Journal of Solid-State Circuits 33 (10), 1568-1571, 1998
185 1998 A spread-spectrum clock generator with triangular modulation HH Chang, IH Hua, SI Liu
IEEE Journal of Solid-State Circuits 38 (4), 673-676, 2003
172 2003 Inductorless wideband CMOS low-noise amplifiers using noise-canceling technique KH Chen, SI Liu
IEEE Transactions on Circuits and Systems I: Regular Papers 59 (2), 305-314, 2011
162 2011 Clock-deskew buffer using a SAR-controlled delay-locked loop GK Dehng, JM Hsu, CY Yang, SI Liu
IEEE Journal of solid-state circuits 35 (8), 1128-1136, 2000
154 2000 Fast-switching frequency synthesizer with a discriminator-aided phase detector CY Yang, SI Liu
IEEE Journal of solid-state circuits 35 (10), 1445-1452, 2000
151 2000 40 Gb/s transimpedance-AGC amplifier and CDR circuit for broadband data receivers in 90 nm CMOS CF Liao, SI Liu
IEEE Journal of Solid-State Circuits 43 (3), 642-655, 2008
140 2008 A 0.18- IH Wang, SI Liu
IEEE Transactions on Circuits and Systems II: Express Briefs 55 (2), 136-140, 2008
134 2008 A digital calibration technique for charge pumps in phase-locked systems CF Liang, SH Chen, SI Liu
IEEE Journal of Solid-State Circuits 43 (2), 390-398, 2008
134 2008 Parasitic-capacitance-insensitive current-mode filters using operational transresistance amplifiers JJ Chen, HW Tsao, SI Liu, W Chiu
IEE Proceedings-Circuits, Devices and Systems 142 (3), 186-192, 1995
124 1995 A 2.4-GHz subharmonically injection-locked PLL with self-calibrated injection timing YC Huang, SI Liu
IEEE journal of solid-state circuits 48 (2), 417-428, 2012
123 2012 A wide-range and fast-locking all-digital cycle-controlled delay-locked loop HH Chang, SI Liu
IEEE Journal of Solid-State Circuits 40 (3), 661-670, 2005
113 2005 Voltage-mode universal filters using two current conveyors SI Liu, JL Lee
International Journal of Electronics 82 (2), 145-150, 1997
110 1997 