| An Advanced Genetic Algorithm with Improved Support Vector Machine for Multi-Class Classification of Real Power Quality Events Rahul, B Choudhary Electric Power Systems Research 191, 106879, 2020 | 29* | 2020 |
| Improved tri-state buffer in MOS current mode logic and its application N Pandey, B Choudhary Analog integrated circuits and signal processing 84, 333-340, 2015 | 12 | 2015 |
| MOS current mode logic exclusive-OR gate using multi-threshold triple-tail cells N Pandey, K Gupta, G Bhatia, B Choudhary Microelectronics journal 57, 13-20, 2016 | 11 | 2016 |
| Impact on DC and analog/RF performances of SOI based GaN FinFET considering high-k gate oxide VS Rajawat, A Kumar, B Choudhary Memories-Materials, Devices, Circuits and Systems 5, 100079, 2023 | 8 | 2023 |
| Bus implementation using new low power PFSCL tristate buffers N Pandey, B Choudhary, K Gupta, A Mittal Active and Passive Electronic Components 2016 (1), 4517292, 2016 | 8 | 2016 |
| Digital-logic assessment of junctionless twin gate trench channel (JL-TGTC) MOSFET for memory circuit applications A Kumar, N Gupta, A Jain, R Gupta, B Choudhary, K Kumar, AK Goyal, ... Memories-Materials, Devices, Circuits and Systems 6, 100087, 2023 | 7 | 2023 |
| Design of MCML-based LFSR for low power and mixed signal applications S Agarwal, N Pandey, B Choudhary, K Gupta 2015 Annual IEEE India Conference (INDICON), 1-6, 2015 | 6 | 2015 |
| New sleep-based PFSCL tri-state inverter/buffer topologies N Pandey, B Choudhary, K Gupta, A Mittal Journal of Circuits, Systems and Computers 26 (12), 1750186, 2017 | 5 | 2017 |
| New Proposal for MCML Based Three‐Input Logic Implementation N Pandey, K Gupta, B Choudhary VLSI Design 2016 (1), 8712768, 2016 | 5 | 2016 |
| Hybrid Dynamic MCML Style: A High Speed Dynamic MCML Style N Pandey, D Garg, K Gupta, B Choudhary Journal of Engineering 2016 (1), 8027150, 2016 | 4 | 2016 |
| MCML Dynamic Register Design N Pandey, K Gupta, B Choudhary 2018 IEEE 61st International Midwest Symposium on Circuits and Systems …, 2018 | 3 | 2018 |
| Performance assessment of high-k soi gan finfet with different fin aspect ratio for rf/wireless applications VS Rajawat, B Choudhary, A Kumar Wireless Personal Communications 136 (2), 867-882, 2024 | 2 | 2024 |
| Implementation of Digital Applications Using Efficient CML based designs B Choudhary 2023 International Conference on Device Intelligence, Computing and …, 2023 | 2 | 2023 |
| High-k SOI GaN FinFET for High Power and High Frequency Applications VS Rajawat, B Choudhary, A Kumar 2022 IEEE International Conference of Electron Devices Society Kolkata …, 2022 | 2 | 2022 |
| Physical Analysis of Lateral-BTBT Induced GIDL Current in GaN-Based FinFET Devices VS Rajawat, A Kumar, B Choudhary 2024 IEEE Open Conference of Electrical, Electronic and Information Sciences …, 2024 | 1 | 2024 |
| Optimization in PFSCL Design Using Floating-Gate MOSFET R Bhaskar, B Choudhary, R Saha 2023 Second International Conference on Trends in Electrical, Electronics …, 2023 | 1 | 2023 |
| Machine Learning and Deep Learning Based Hybrid Approach for Power Quality Disturbances Analysis R Rahul, B Choudhary 2023 International Conference on Computational Intelligence and Knowledge …, 2023 | 1 | 2023 |
| TCAD simulation of sub-10 nm high-k SOI GaN FinFET by implementing fin optimization approach for high-performance applications VS Rajawat, A Kumar, B Choudhary Analog Integrated Circuits and Signal Processing 122 (1), 1-12, 2025 | | 2025 |
| An Efficient PFSCL based D-Latch Design Using Dynamic-Threshold Voltage MOSFET R Bhaskar, B Choudhary, R Saha 2024 IEEE North Karnataka Subsection Flagship International Conference …, 2024 | | 2024 |
| Design and Investigation of Gate Overlap Step Shape Double Gate (SSDG) TFET for Photosensing Applications N Tiwari, R Saha, B Choudhary Transactions on Electrical and Electronic Materials, 1-9, 2024 | | 2024 |
Neeta PandeyDelhi Technological University DelhiAdresse e-mail validée de dce.ac.in
