Suivre
Vignesh Balaji
Vignesh Balaji
Research Scientist, NVIDIA
Adresse e-mail validée de nvidia.com - Page d'accueil
Titre
Citée par
Citée par
Année
Intermittent computing: Challenges and opportunities
B Lucia, V Balaji, A Colin, K Maeng, E Ruppel
2nd Summit on Advances in Programming Languages (SNAPL 2017), 2017
2362017
When is graph reordering an optimization? studying the effect of lightweight graph reordering across applications and input graphs
V Balaji, B Lucia
2018 IEEE International Symposium on Workload Characterization (IISWC), 203-214, 2018
922018
P-opt: Practical optimal cache replacement for graph analytics
V Balaji, N Crago, A Jaleel, B Lucia
2021 IEEE International Symposium on High-Performance Computer Architecture …, 2021
452021
Combining data duplication and graph reordering to accelerate parallel graph processing
V Balaji, B Lucia
Proceedings of the 28th International symposium on high-performance parallel …, 2019
272019
Symphony: Orchestrating sparse and dense tensors with hierarchical heterogeneous processing
M Pellauer, J Clemons, V Balaji, N Crago, A Jaleel, D Lee, M O’Connor, ...
ACM Transactions on Computer Systems 41 (1-4), 1-30, 2023
72023
Flexible support for fast parallel commutative updates
V Balaji, D Tirumala, B Lucia
arXiv preprint arXiv:1709.09491, 2017
52017
Community-based matrix reordering for sparse linear algebra optimization
V Balaji, NC Crago, A Jaleel, SW Keckler
2023 IEEE International Symposium on Performance Analysis of Systems and …, 2023
42023
Overcoming the data-flow limit on parallelism with structural approximation
V Balaji, B Lucia, R Marculescu
WAX 2016, 2016
42016
Improving Locality of Irregular Updates with Hardware Assisted Propagation Blocking
V Balaji, B Lucia
2022 IEEE International Symposium on High-Performance Computer Architecture …, 2022
32022
Neat: Low-Complexity, Efficient On-Chip Cache Coherence
R Zhang, S Biswas, V Balaji, MD Bond, B Lucia
arXiv preprint arXiv:2107.05453, 2021
22021
Input, representation, and access pattern guided cache locality optimizations for graph analytics
V Balaji
Carnegie Mellon University, 2021
22021
Optimizing graph processing and preprocessing with hardware assisted propagation blocking
V Balaji, B Lucia
arXiv preprint arXiv:2011.08451, 2020
22020
Peacenik: Architecture support for not failing under fail-stop memory consistency
R Zhang, S Biswas, V Balaji, MD Bond, B Lucia
Proceedings of the Twenty-Fifth International Conference on Architectural …, 2020
22020
Poster: An architecture and programming model for accelerating parallel commutative computations via privatization
V Balaji, D Tirumala, B Lucia
ACM SIGPLAN Notices 52 (8), 431-432, 2017
22017
2022 IEEE International Symposium on High-Performance Computer Architecture (HPCA)| 978-1-6654-2027-3/22/$31.00© 2022 IEEE| DOI: 10.1109/HPCA53966. 2022.00094
H Abdel-Aziz, B Acun, NB Agostini, M Annavaram, JL Aragón, A Awad, ...
External Review Committee
USC Murali Annavaram, A Arunkumar, V Balaji, R Bertran, ...
2021 IEEE International Symposium on High-Performance Computer Architecture (HPCA)| 978-1-6654-2235-2/20/$31.00© 2021 IEEE| DOI: 10.1109/HPCA51647. 2021.00082
S Abadal, B Acun, R Afoakwa, S Agarwal, A Ahmadi, J Ahn, S Ainsworth, ...
Le système ne peut pas réaliser cette opération maintenant. Veuillez réessayer plus tard.
Articles 1–17