FinFET modeling for IC simulation and design: using the BSIM-CMG standard YS Chauhan, D Lu, S Vanugopalan, S Khandelwal, JP Duarte, ...
Academic Press, 2015
249 2015 BSIM6: Analog and RF compact model for bulk MOSFET YS Chauhan, S Venugopalan, MA Chalkiadaki, MAU Karim, H Agarwal, ...
IEEE Transactions on Electron Devices 61 (2), 234-244, 2013
146 2013 BSIM—SPICE models enable FinFET and UTB IC designs N Paydavosi, S Venugopalan, YS Chauhan, JP Duarte, S Jandhyala, ...
IEEE Access 1, 201-215, 2013
144 2013 BSIM—Industry standard compact MOSFET models YS Chauhan, S Venugopalan, MA Karim, S Khandelwal, N Paydavosi, ...
2012 Proceedings of the European Solid-State Device Research Conference …, 2012
93 2012 Bsim4v4. 8.0 mosfet model N Paydavosi, TH Morshed, DD Lu, WM Yang, MV Dunga, XJ Xi, J He, ...
University of California, Berkeley (CA), 2013
43 2013 Unified FinFET compact model: Modelling trapezoidal triple-gate FinFETs JP Duarte, N Paydavosi, S Venugopalan, A Sachid, C Hu
2013 International Conference on Simulation of Semiconductor Processes and …, 2013
39 2013 BSIM compact MOSFET models for SPICE simulation YS Chauhan, S Venugopalan, N Paydavosi, P Kushwaha, S Jandhyala, ...
Proceedings of the 20th International Conference Mixed Design of Integrated …, 2013
39 2013 Modeling the impact of substrate depletion in FDSOI MOSFETs P Kushwaha, N Paydavosi, S Khandelwal, C Yadav, H Agarwal, ...
Solid-State Electronics 104, 6-11, 2015
33 2015 Recent enhancements in BSIM6 bulk MOSFET model H Agarwal, S Venugopalan, MA Chalkiadaki, N Paydavosi, JP Duarte, ...
2013 International Conference on Simulation of Semiconductor Processes and …, 2013
33 2013 BSIM-CMG 110.0. 0: Multi-gate MOSFET compact model: technical manual S Khandelwal, JP Duarte, AS Medury, S Venugopalan, N Paydavosi, ...
BSIM Group UC Berkeley, 2015
30 2015 RF linearity potential of carbon-nanotube transistors versus MOSFETs AU Alam, CMS Rogers, N Paydavosi, KD Holland, S Ahmed, ...
IEEE transactions on nanotechnology 12 (3), 340-351, 2013
27 2013 Impact of Contact Resistance on the KD Holland, AU Alam, N Paydavosi, M Wong, CM Rogers, S Rizwan, ...
IEEE Transactions on Nanotechnology 16 (1), 94-106, 2016
26 2016 BSIM6: Symmetric bulk MOSFET model YS Chauhan, MA Karim, S Venugopalan, S Khandelwal, P Thakur, ...
Nanotechnology 2012: Electronics, Devices, Fabrication, MEMS, Fluidics and …, 2012
23 2012 RF performance potential of array-based carbon-nanotube transistors—part II: extrinsic results N Paydavosi, JP Rebstock, KD Holland, S Ahmed, AU Alam, ...
IEEE transactions on electron devices 58 (7), 1941-1951, 2011
19 2011 Bsim-cmg 107.0. 0: Multi-gate mosfet compact model (technical manual) V Sriramkumar, N Paydavosi, J Duarte, D Lu, CH Lin, M Dunga, S Yao, ...
University of California, Berkeley, 2013
18 2013 BSIM-CMG 108.0. 0: Multi-gate MOSFET compact model: technical manual S Khandelwal, JP Duarte, S Venugopalan, N Paydavosi, DD Lu, CH Lin, ...
BSIM Group UC Berkeley, 2014
17 * 2014 RF performance potential of array-based carbon-nanotube transistors—Part I: Intrinsic results N Paydavosi, AU Alam, S Ahmed, KD Holland, JP Rebstock, ...
IEEE transactions on electron devices 58 (7), 1928-1940, 2011
17 2011 Understanding the frequency-and time-dependent behavior of ballistic carbon-nanotube transistors N Paydavosi, KD Holland, MM Zargham, M Vaidyanathan
IEEE transactions on nanotechnology 8 (2), 234-244, 2008
17 2008 RF performance limits and operating physics arising from the lack of a bandgap in graphene transistors KD Holland, N Paydavosi, N Neophytou, D Kienle, M Vaidyanathan
IEEE transactions on nanotechnology 12 (4), 566-577, 2013
16 2013 BSIM6. 0 MOSFET compact model YS Chauhan, MA Karim, S Venugopalan, H Agarwal, P Thakur, ...
Technical Manual, May, 2013
10 2013 
Ali M NIKNEJADUC BerkeleyAdresse e-mail validée de berkeley.edu