A 1.2 V 12.8 GB/s 2 Gb Mobile Wide-I/O DRAM With 4 JS Kim, CS Oh, H Lee, D Lee, HR Hwang, S Hwang, B Na, J Moon, ...
IEEE Journal of Solid-State Circuits 47 (1), 107-116, 2012
404 2012 Quantifying the relationship between the power delivery network and architectural policies in a 3D-stacked memory device M Shevgoor, JS Kim, N Chatterjee, R Balasubramonian, A Davis, ...
Proceedings of the 46th Annual IEEE/ACM International Symposium on …, 2013
60 2013 Semiconductor devices and semiconductor packages CS Oh, JS Kim, HC Lee, JB Lee
US Patent 8,799,730, 2014
55 2014 SEMICONDUCTOR DEVICES AND SEMICONDUCTOR PACKAGES J Kim, H Lee, J Lee
US Patent App. 13/453,447, 2012
55 * 2012 Semiconductor device having interconnection in package and method for manufacturing the same J Lee, JS Kim, Y Lee, D Kim, S Yim, K Park, C Park
US Patent 9,805,769, 2017
50 2017 Semiconductor memory device that controls refresh period, memory system and operating method thereof JS Kim, C Kim, SH Shin
US Patent 9,490,001, 2016
45 2016 Semiconductor device with stacked structure having through electrode, semiconductor memory device, semiconductor memory system, and operating method thereof JS Kim, DH Lee, HC Lee, JW Ryu
US Patent 8,801,279, 2014
39 2014 23.2 A 5Gb/s/pin 8Gb LPDDR4X SDRAM with power-isolated LVSTL and split-die architecture with 2-die ZQ calibration scheme CK Lee, YJ Eom, JH Park, J Lee, HR Kim, K Kim, Y Choi, HJ Chang, J Kim, ...
Solid-State Circuits Conference (ISSCC), 2017 IEEE International, 390-391, 2017
37 2017 Semiconductor memory device storing refresh period information and operating method thereof JS Kim, JB Lee
US Patent 9,082,504, 2015
21 2015 Integrated circuit having power gating function and semiconductor device including the same JS Kim
US Patent App. 13/367,411, 2012
17 2012 Memory device to correct defect cell generated after packaging C Kim, SH Shin, JS Kim
US Patent 9,455,047, 2016
15 2016 Semiconductor memory device having improved refresh characteristics JS Kim, C Kim, SH Shin, JB Lee, CY Lee, SM Yim, TS Jang, JS Choi
US Patent 9,036,439, 2015
13 2015 Input buffer with wide input voltage range DI Seo, HD Kim, J Kim
US Patent 7,365,571, 2008
13 2008 Semiconductor memory device, systems and methods improving refresh quality for weak cell JS Kim, J Lee
US Patent App. 13/802,748, 2013
12 2013 Internal power generating apparatus, multichannel memory including the same, and processing system employing the multichannel memory JS Kim, HC Lee, JW Ryu
US Patent 8,315,121, 2012
12 2012 Circuit and method for generating internal voltage, and semiconductor device having the circuit SY Kim, JS Kim, JW Ryu, HC Lee, JB Lee
US Patent 8,278,992, 2012
11 2012 Memory device, method of operating the same, and apparatus including the same Y Lim, C Kim, JS Kim, YS Lee
US Patent 8,737,153, 2014
10 2014 A 512 Mb two-channel mobile DRAM (OneDRAM) with shared memory array JS Kim, K Nam, CS Oh, HG Sohn, D Lee, S Kim, JW Park, Y Kim, MJ Kim, ...
IEEE Journal of Solid-State Circuits 43 (11), 2381-2389, 2008
10 2008 A 512 mb 2-channel mobile DRAM (oneDRAM™) with shared memory array K Nam, JS Kim, CS Oh, H Sohn, DH Lee, C Lee, S Kim, JW Park, Y Kim, ...
Solid-State Circuits Conference, 2007. ASSCC'07. IEEE Asian, 204-207, 2007
9 2007 Theory of 1/f noise currents in semiconductor devices with one-dimensional geometry and its application to Si Schottky barrier diodes JS Kim, YS Kim, HS Min, YJ Park
IEEE Transactions on Electron Devices 48 (12), 2875-2883, 2001
8 2001 
Donghyuk LeeNVIDIAAdresse e-mail validée de nvidia.com
