| Neuromorphic hardware in the loop: Training a deep spiking network on the brainscales wafer-scale system S Schmitt, J Klähn, G Bellec, A Grübl, M Guettler, A Hartel, S Hartmann, ... 2017 International Joint Conference on Neural Networks (IJCNN), 2227-2234, 2017 | 214 | 2017 |
| A comprehensive workflow for general-purpose neural modeling with highly configurable neuromorphic hardware systems D Brüderle, MA Petrovici, B Vogginger, M Ehrlich, T Pfeil, S Millner, ... Biological cybernetics 104 (4), 263-296, 2011 | 149 | 2011 |
| A biological-realtime neuromorphic system in 28 nm CMOS using low-leakage switched capacitor circuits C Mayr, J Partzsch, M Noack, S Hänzsche, S Scholze, S Höppner, ... IEEE transactions on biomedical circuits and systems 10 (1), 243-254, 2015 | 117 | 2015 |
| The SpiNNaker 2 Processing Element Architecture for Hybrid Digital Neuromorphic Computing S Höppner, Y Yan, A Dixius, S Scholze, J Partzsch, M Stolba, F Kelber, ... arXiv preprint arXiv:2103.08392, 2021 | 88 | 2021 |
| Live demonstration: A scaled-down version of the BrainScaleS wafer-scale neuromorphic system J Schemmel, A Grübl, S Hartmann, A Kononov, C Mayr, K Meier, S Millner, ... Circuits and Systems (ISCAS), 2012 IEEE International Symposium on, 702-702, 2012 | 87 | 2012 |
| Memory-efficient deep learning on a SpiNNaker 2 prototype C Liu, G Bellec, B Vogginger, D Kappel, J Partzsch, F Neumärker, ... Frontiers in neuroscience 12, 840, 2018 | 73 | 2018 |
| Rate and pulse based plasticity governed by local synaptic state variables CG Mayr, J Partzsch Frontiers in synaptic neuroscience 2, 2010 | 55 | 2010 |
| A 32GBit/s communication SoC for a waferscale neuromorphic system S Scholze, H Eisenreich, S Höppner, G Ellguth, S Henker, M Ander, ... Integration, the VLSI Journal 45 (1), 61-75, 2012 | 54 | 2012 |
| VLSI implementation of a 2.8 Gevent/s packet-based AER interface with routing and event sorting functionality S Scholze, S Schiefer, J Partzsch, S Hartmann, CG Mayr, S Höppner, ... Frontiers in neuroscience 5, 2011 | 52 | 2011 |
| Efficient reward-based structural plasticity on a SpiNNaker 2 prototype Y Yan, D Kappel, F Neumärker, J Partzsch, B Vogginger, S Höppner, ... IEEE transactions on biomedical circuits and systems 13 (3), 579-591, 2019 | 50 | 2019 |
| A fixed point exponential function accelerator for a neuromorphic many-core system J Partzsch, S Höppner, M Eberlein, R Schüffny, C Mayr, DR Lester, ... Circuits and Systems (ISCAS), 2017 IEEE International Symposium on, 1-4, 2017 | 50 | 2017 |
| Comparing Loihi with a SpiNNaker 2 Prototype on Low-Latency Keyword Spotting and Adaptive Robotic Control Y Yan, T Stewart, X Choo, B Vogginger, J Partzsch, S Hoeppner, F Kelber, ... Neuromorphic Computing and Engineering, 2021 | 49 | 2021 |
| Switched-capacitor realization of presynaptic short-term-plasticity and stop-learning synapses in 28 nm CMOS M Noack, J Partzsch, CG Mayr, S Hänzsche, S Scholze, S Höppner, ... Frontiers in neuroscience 9, 10, 2015 | 47 | 2015 |
| Plasticity and Adaptation in Neuromorphic Biohybrid Systems R George, M Chiappalone, M Giugliano, T Levi, S Vassanelli, J Partzsch, ... Iscience, 101589, 2020 | 46 | 2020 |
| Analyzing the scaling of connectivity in neuromorphic hardware and in models of neural networks J Partzsch, R Schüffny Neural Networks, IEEE Transactions on 22 (6), 919-935, 2011 | 43 | 2011 |
| The Operating System of the Neuromorphic BrainScaleS-1 System E Müller, S Schmitt, C Mauch, S Billaudelle, A Grübl, M Güttler, ... arXiv preprint arXiv:2003.13749, 2020 | 35 | 2020 |
| Waveform driven plasticity in BiFeO3 memristive devices: model and implementation C Mayr, P Stärke, J Partzsch, L Cederstroem, R Schüffny, Y Shuai, N Du, ... Advances in Neural Information Processing Systems, 1700-1708, 2012 | 35 | 2012 |
| Dynamic voltage and frequency scaling for neuromorphic many-core systems S Höppner, Y Yan, B Vogginger, A Dixius, J Partzsch, F Neumärker, ... 2017 IEEE International Symposium on Circuits and Systems (ISCAS), 1-4, 2017 | 31 | 2017 |
| Highly integrated packet-based AER communication infrastructure with 3Gevent/s throughput S Hartmann, S Schiefer, S Scholze, J Partzsch, C Mayr, S Henker, ... Electronics, Circuits, and Systems (ICECS), 2010 17th IEEE International …, 2010 | 30 | 2010 |
| Reducing the computational footprint for real-time BCPNN learning B Vogginger, R Schüffny, A Lansner, L Cederström, J Partzsch, ... Name: Frontiers in Neuroscience 9 (2), 2015 | 29 | 2015 |
Christian MayrProfessor, Technische Universität DresdenAdresse e-mail validée de tu-dresden.de
