| Parameterized tiling revisited MM Baskaran, A Hartono, S Tavarageri, T Henretty, J Ramanujam, ... Proceedings of the 8th annual IEEE/ACM international symposium on Code …, 2010 | 99 | 2010 |
| Dynamic selection of tile sizes S Tavarageri, LN Pouchet, J Ramanujam, A Rountev, P Sadayappan 2011 18th International Conference on High Performance Computing, 1-10, 2011 | 41 | 2011 |
| Parametric tiling of affine loop nests S Tavarageri, A Hartono, M Baskaran, LN Pouchet, J Ramanujam, ... Proc. 15th Workshop on Compilers for Parallel Computers. Vienna, Austria, 2010 | 34 | 2010 |
| PolyDL: Polyhedral optimizations for creation of high-performance dl primitives S Tavarageri, A Heinecke, S Avancha, B Kaul, G Goyal, R Upadrasta ACM Transactions on Architecture and Code Optimization (TACO) 18 (1), 1-27, 2021 | 30 | 2021 |
| AI Powered Compiler Techniques for DL Code Optimization S Tavarageri, G Goyal, S Avancha, B Kaul, R Upadrasta arXiv preprint arXiv:2104.05573, 2021 | 27 | 2021 |
| Systems and methods for efficient targeting MM Baskaran, T Henretty, A Johnson, A Konstantinidis, MH Langston, ... US Patent 10,466,349, 2019 | 22 | 2019 |
| PWCET: power-aware worst case execution time analysis W Bao, S Tavarageri, F Ozguner, P Sadayappan 2014 43rd International Conference on Parallel Processing Workshops, 439-447, 2014 | 20 | 2014 |
| Compiler-assisted detection of transient memory errors S Tavarageri, S Krishnamoorthy, P Sadayappan Proceedings of the 35th ACM SIGPLAN Conference on Programming Language …, 2014 | 18 | 2014 |
| A compiler analysis to determine useful cache size for energy efficiency S Tavarageri, P Sadayappan 2013 IEEE International Symposium on Parallel & Distributed Processing …, 2013 | 16 | 2013 |
| A medical price prediction system using hierarchical decision trees A Tike, S Tavarageri 2017 IEEE International Conference on Big Data (Big Data), 3904-3913, 2017 | 15 | 2017 |
| A tale of three runtimes N Vasilache, M Baskaran, T Henretty, B Meister, MH Langston, ... arXiv preprint arXiv:1409.1914, 2014 | 15 | 2014 |
| Compiler support for software cache coherence S Tavarageri, W Kim, J Torrellas, P Sadayappan 2016 IEEE 23rd International Conference on High Performance Computing (HiPC …, 2016 | 11 | 2016 |
| Adaptive parallel tiled code generation and accelerated auto-tuning S Tavarageri, J Ramanujam, P Sadayappan The International journal of high performance computing applications 27 (4 …, 2013 | 8 | 2013 |
| Systems and methods for energy proportional scheduling MM Baskaran, T Henretty, A Johnson, A Konstantinidis, MH Langston, ... US Patent 10,540,107, 2020 | 7 | 2020 |
| Architecting and programming a hardware-incoherent multiprocessor cache hierarchy W Kim, S Tavarageri, P Sadayappan, J Torrellas 2016 IEEE International Parallel and Distributed Processing Symposium (IPDPS …, 2016 | 6 | 2016 |
| Systems and methods for efficient targeting MM Baskaran, T Henretty, A Johnson, A Konstantinidis, MH Langston, ... US Patent 11,726,197, 2023 | 5 | 2023 |
| Systems and methods for minimizing communications MM Baskaran, T Henretty, A Johnson, A Konstantinidis, MH Langston, ... US Patent 10,496,304, 2019 | 5 | 2019 |
| Polyscientist: Automatic loop transformations combined with microkernels for optimization of deep learning primitives S Tavarageri, A Heinecke, S Avancha, G Goyal, R Upadrasta, B Kaul arXiv preprint arXiv:2002.02145, 2020 | 3 | 2020 |
| Systems and methods for efficient determination of task dependences after loop tiling MM Baskaran, T Henretty, A Johnson, A Konstantinidis, MH Langston, ... US Patent 10,095,434, 2018 | 3 | 2018 |
| A data analytics framework for aggregate data analysis S Tavarageri, N Mani, A Ramasubramanian, J Kalsi arXiv preprint arXiv:1809.05877, 2018 | 3 | 2018 |
