CALPAN: Countermeasure against leakage power analysis attack by normalized DDPL C Padmini, JVR Ravindra 2016 International Conference on Circuit, Power and Computing Technologies …, 2016 | 9 | 2016 |
Design of leakage resilient and DPA attack immune architecture of S BOX C Padmini, JVR Ravindra 2021 6th International Conference on Communication and Electronics Systems …, 2021 | 4 | 2021 |
PEARL: Performance analysis of ultra low power reversible logic circuits against DPA attacks C Padmini, JVR Ravindra 2016 International Conference on Electrical, Electronics, and Optimization …, 2016 | 3 | 2016 |
A novel circuit of SRAM cell against single-event multiple effects for 45nm technology BN Kumar, C Padmini Int. J. Comput. Appl 149 (7), 1-5, 2016 | 3 | 2016 |
Enhanced delay-based dual-rail precharge logic against leakage power analysis attack M Shivani, C Padmini Int. J. Curr. Eng. Technol 5 (4), 2800-2803, 2015 | 3 | 2015 |
Leakage Resilient Universal Shift Register using Dual Rail, Single Power Clock Adiabatic Logic against DPA Attacks C Padmini, JVR Ravindra International Journal of Advanced Science and Technology 29 (4), pp. 6120-6133, 2020 | 2 | 2020 |
Design and Implementation of a Floating Point ALU on a Stratix – III FPGA SR Prashanth B U V, C.Padmini International Journal of Computer Applications 55 (2), 2012 | 2 | 2012 |
Wireless Measurement System using Zigbee Transmission implemented on TEA C Padmini, GBP Ram, VB Prashanth International Journal of Advances in Electrical and Electronics Engineering …, 2010 | 1 | 2010 |
Leakage Resilient Adder using Dual Rail, Single Clock Adiabatic Logic against DPA Attacks C Padmini, JVR Ravindra International Journal of Advanced Science and Technology 29 (4), pp. 6120-6133, 2020 | | 2020 |
Leakage Resilient Adder using Dual Rail, Single Clock Adiabatic Logic against DPA Attacks C Padmini, JVR Ravindra International Journal of Advanced Science and Technology 29 (4), pp. 6120-6133, 2020 | | 2020 |
A Secure Stenographic Technique for Embedding Text using Adaptive Pixel Pair Matching CP K Madhuri GJRE Online 4 (06), 2014 | | 2014 |
An Efficient Intruder Avoidance Method for MANETs CP Koppula.Jagadeesh International Journal of Computer Applications 103 (14), 2012 | | 2012 |
An Innovative VLSI algorithm Design Technique to reduce Leakage Current in CMOS VLSI Circuits VBP C. Padmini,G. BhaskarPhani Ram International Journal of Advances in Electrical & Electronics Engineering 1 (2), 2012 | | 2012 |
Design and Implementation of Microcode based Built-in Self-Test for Fault Detection in Memory and its Repair CT C. Padmini International Journal of Computer Applications 78 (9), 2012 | | 2012 |
Wireless Measurement System using Zigbee Transmission implemented on TES GBP Venkat.B.Prashanth, C. Padmini, Eliyaz Mohammed International Journal of Advances in Electrical & Electronics Engineering 2 (1), 2012 | | 2012 |
An Innovative VLSI Algorithm Design Technique To Reduce Leakage Current In CMOS VLSI Circuits VB Prashanth, C Padmini, E Mohammed, GBP Ram | | |