Yuzhe Ma

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Bei YuThe Chinese University of Hong KongAdresse e-mail validée de cse.cuhk.edu.hk
Haoyu YangNVIDIA Corp.Adresse e-mail validée de nvidia.com
Martin D. F. WongEdward C. Jordan Professor of Electrical and Computer Engineering, University of Illinois at UrbanaAdresse e-mail validée de illinois.edu
Evangeline F.Y. YoungThe Chinese University of Hong KongAdresse e-mail validée de cse.cuhk.edu.hk
Zhuolun HeThe Chinese University of Hong KongAdresse e-mail validée de cse.cuhk.edu.hk
Subhendu RoyCadence Design SystemsAdresse e-mail validée de utexas.edu
Qi SunZJU100 Young Professor, Zhejiang UniversityAdresse e-mail validée de zju.edu.cn
Haoxing Ren (Mark)NvidiaAdresse e-mail validée de nvidia.com
Brucek KhailanySenior Director of VLSI Research, NVIDIAAdresse e-mail validée de cva.stanford.edu
Gengjie ChenHuaweiAdresse e-mail validée de huawei.com
Yibo LinAssistant Professor at Peking UniversityAdresse e-mail validée de pku.edu.cn
Kang LiuHuazhong University of Science and TechnologyAdresse e-mail validée de hust.edu.cn
Chak-Wa PuiPhD, UniVistaAdresse e-mail validée de univista-isg.com
David Z. PanProfessor, Silicon Labs Endowed Chair, ECE Dept., University of Texas at AustinAdresse e-mail validée de ece.utexas.edu
Tsung-Yi HoChinese University of Hong KongAdresse e-mail validée de cse.cuhk.edu.hk
Wenjian YuDept. Computer Science & Technology, Tsinghua UniversityAdresse e-mail validée de tsinghua.edu.cn
Siddharth GargInstitute Associate Professor, New York UniversityAdresse e-mail validée de nyu.edu
Ramesh Karri కర్రి రమేష్Professor of Electrical and Computer Engineering, New York UniversityAdresse e-mail validée de nyu.edu
Meng LiPeking University; Ex-FacebookAdresse e-mail validée de pku.edu.cn

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Yuzhe Ma

Hong Kong University of Science and Technology (Guangzhou)

Adresse e-mail validée de hkust-gz.edu.cn - Page d'accueil

EDA VLSI CAD Computational Lithography Physical Design Machine Learning


Titre Trier par citations Trier par année Trier par titre	Citée par Citée par	Année
Recent advances in convolutional neural network acceleration Q Zhang, M Zhang, T Chen, Z Sun, Y Ma, B Yu Neurocomputing 323, 37-51, 2019	481	2019
Machine learning for electronic design automation: A survey G Huang, J Hu, Y He, J Liu, M Ma, Z Shen, J Wu, Y Xu, H Zhang, K Zhong, ... ACM Transactions on Design Automation of Electronic Systems (TODAES) 26 (5 …, 2021	293	2021
GAN-OPC: Mask optimization with lithography-guided generative adversarial nets H Yang, S Li, Y Ma, B Yu, EFY Young Proceedings of the 55th Annual Design Automation Conference, 1-6, 2018	187	2018
Layout hotspot detection with feature tensor generation and deep biased learning H Yang, J Su, Y Zou, B Yu, EFY Young Proceedings of the 54th Annual Design Automation Conference 2017, 1-6, 2017	164	2017
High performance graph convolutional networks with applications in testability analysis Y Ma, H Ren, B Khailany, H Sikka, L Luo, K Natarajan, B Yu Proceedings of the 56th Annual Design Automation Conference 2019, 1-6, 2019	139	2019
BOOM-Explorer: RISC-V BOOM microarchitecture design space exploration framework C Bai, Q Sun, J Zhai, Y Ma, B Yu, MDF Wong 2021 IEEE/ACM International Conference On Computer Aided Design (ICCAD), 1-9, 2021	74	2021
Clock-aware ultrascale FPGA placement with machine learning routability prediction CW Pui, G Chen, Y Ma, EFY Young, B Yu 2017 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 929-936, 2017	70	2017
DAMO: Deep agile mask optimization for full chip scale G Chen, W Chen, Y Ma, H Yang, B Yu Proceedings of the 39th International Conference on Computer-Aided Design, 1-9, 2020	64	2020
Understanding graphs in EDA: From shallow to deep learning Y Ma, Z He, W Li, L Zhang, B Yu Proceedings of the 2020 international symposium on physical design, 119-126, 2020	53	2020
Cross-layer optimization for high speed adders: A pareto driven machine learning approach Y Ma, S Roy, J Miao, J Chen, B Yu IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2018	48	2018
DevelSet: Deep neural level set for instant mask optimization G Chen, Z Yu, H Liu, Y Ma, B Yu IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2023	46	2023
Neural-ILT: Migrating ILT to neural networks for mask printability and complexity co-optimization B Jiang, L Liu, Y Ma, H Zhang, B Yu, EFY Young Proceedings of the 39th International Conference on Computer-Aided Design, 1-9, 2020	46	2020
Learn to floorplan through acquisition of effective local search heuristics Z He, Y Ma, L Zhang, P Liao, N Wong, B Yu, MDF Wong 2020 IEEE 38th International Conference on Computer Design (ICCD), 324-331, 2020	40	2020
SRAF insertion via supervised dictionary learning H Geng, H Yang, Y Ma, J Mitra, B Yu Proceedings of the 24th Asia and South Pacific Design Automation Conference …, 2019	40	2019
A GPU-enabled level-set method for mask optimization Z Yu, G Chen, Y Ma, B Yu IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2022	38	2022
Adversarial perturbation attacks on ML-based CAD: A case study on CNN-based lithographic hotspot detection K Liu, H Yang, Y Ma, B Tan, B Yu, EFY Young, R Karri, S Garg ACM Transactions on Design Automation of Electronic Systems (TODAES) 25 (5 …, 2020	35	2020
A unified framework for simultaneous layout decomposition and mask optimization Y Ma, W Zhong, S Hu, JR Gao, J Kuang, J Miao, B Yu IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2020	35	2020
CAD tool design space exploration via Bayesian optimization Y Ma, Z Yu, B Yu 2019 ACM/IEEE 1st Workshop on Machine Learning for CAD (MLCAD), 1-6, 2019	35	2019
High-speed adder design space exploration via graph neural processes H Geng, Y Ma, Q Xu, J Miao, S Roy, B Yu IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2021	27	2021
Neural-ILT 2.0: Migrating ILT to domain-specific and multitask-enabled neural network B Jiang, L Liu, Y Ma, B Yu, EFY Young IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2021	25	2021

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