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Víctor Soria Pardos
Víctor Soria Pardos
अन्य नामVíctor Soria, Víctor Soria-Pardos, V. Soria-Pardos, V. Soria, V. S. Pardos
Computer Architecture PhD, Barcelona Supercomputing Center
bsc.es पर सत्यापित ईमेल
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इन्होंने कहा
इन्होंने कहा
वर्ष
An academic risc-v silicon implementation based on open-source components
J Abella, C Bulla, G Cabo, FJ Cazorla, A Cristal, M Doblas, R Figueras, ...
2020 XXXV conference on design of circuits and integrated systems (DCIS), 1-6, 2020
252020
Sargantana: A 1 GHz+ in-order RISC-V processor with SIMD vector extensions in 22nm FD-SOI
V Soria-Pardos, M Doblas, G López–Paradís, G Candón, N Rodas, ...
2022 25th Euromicro Conference on Digital System Design (DSD), 254-261, 2022
222022
On the use of many-core Marvell ThunderX2 processor for HPC workloads
V Soria-Pardos, A Armejach, D Suárez, M Moretó
The Journal of Supercomputing 77, 3315-3338, 2021
102021
DVINO: A RISC-V vector processor implemented in 65nm technology
G Cabo, G Candón, X Carril, M Doblas, M Domínguez, A González, ...
2022 37th Conference on Design of Circuits and Integrated Circuits (DCIS), 1-6, 2022
92022
GenArchBench: A genomics benchmark suite for arm HPC processors
L López-Villellas, R Langarita-Benítez, A Badouh, V Soria-Pardos, ...
Future Generation Computer Systems 157, 313-329, 2024
52024
A Tensor Marshaling Unit for Sparse Tensor Algebra on General-Purpose Processors
M Siracusa, V Soria-Pardos, F Sgherzi, J Randall, DJ Joseph, MM Planas, ...
Proceedings of the 56th Annual IEEE/ACM International Symposium on …, 2023
42023
Sargantana: An Academic SoC RISC-V Processor in 22nm FDSOI Technology
M Doblas, G Candón, X Carril, M Domínguez, E Erra, A González, ...
2023 38th Conference on Design of Circuits and Integrated Systems (DCIS), 1-6, 2023
32023
DynAMO: Improving Parallelism Through Dynamic Placement of Atomic Memory Operations
V Soria-Pardos, A Armejach, T Mück, D Suárez-Gracia, J Joao, A Rico, ...
Proceedings of the 50th Annual International Symposium on Computer …, 2023
3*2023
Characterization and Modeling of Atomic Memory Operations in Arm Based Architectures
VS Pardos
Master’s thesis, Universitat Politècnica de Catalunya, BarcelonaTech, 2022
22022
Characterization of HPC Applications for ARM SIMD Instructions
VS Pardos
Universitat Politècnica de Catalunya. Facultat d'Informàtica de Barcelona, 2019
2*2019
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