Effective hardware-based data prefetching for high-performance processors TF Chen, JL Baer IEEE transactions on computers 44 (5), 609-623, 1995 | 807 | 1995 |
An effective on-chip preloading scheme to reduce data access penalty JL Baer, TF Chen Proceedings of the 1991 ACM/IEEE conference on Supercomputing, 176-186, 1991 | 637 | 1991 |
Reducing memory latency via non-blocking and prefetching caches TF Chen, JL Baer ACM SIGPLAN Notices 27 (9), 51-61, 1992 | 373 | 1992 |
A performance study of software and hardware data prefetching schemes TF Chen, JL Baer ACM SIGARCH Computer Architecture News 22 (2), 223-232, 1994 | 312 | 1994 |
Llm4ts: Two-stage fine-tuning for time-series forecasting with pre-trained llms C Chang, WC Peng, TF Chen CoRR, 2023 | 120 | 2023 |
Segmented bus design for low-power systems JY Chen, WB Jone, JS Wang, HI Lu, TF Chen IEEE Transactions on Very Large Scale Integration (VLSI) Systems 7 (1), 25-29, 1999 | 117 | 1999 |
Inverted file compression through document identifier reassignment WY Shieh, TF Chen, JJJ Shann, CP Chung Information processing & management 39 (1), 117-131, 2003 | 99 | 2003 |
Evaluation and design trade-offs between circuit-switched and packet-switched NoCs for application-specific SoCs K Chang, J Shen, T Chen Proceedings of the 43rd annual Design Automation Conference, 143-148, 2006 | 89 | 2006 |
17.5 A 3T1R nonvolatile TCAM using MLC ReRAM with sub-1ns search time MF Chang, CC Lin, A Lee, CC Kuo, GH Yang, HJ Tsai, TF Chen, SS Sheu, ... 2015 IEEE International Solid-State Circuits Conference-(ISSCC) Digest of …, 2015 | 88 | 2015 |
Data prefetching for high-performance processors TF Chen University of Washington, 1993 | 88 | 1993 |
7.4 A 256b-wordlength ReRAM-based TCAM with 1ns search-time and 14× improvement in wordlength-energyefficiency-density product using 2.5 T1R cell CC Lin, JY Hung, WZ Lin, CP Lo, YN Chiang, HJ Tsai, GH Yang, YC King, ... 2016 IEEE International Solid-State Circuits Conference (ISSCC), 136-137, 2016 | 80 | 2016 |
An effective programmable prefetch engine for on-chip caches TF Chen Proceedings of the 28th annual international symposium on Microarchitecture …, 1995 | 76 | 1995 |
ReRAM-based 4T2R nonvolatile TCAM with 7x NVM-stress reduction, and 4x improvement in speed-wordlength-capacity for normally-off instant-on filter-based search engines used in … LY Huang, MF Chang, CH Chuang, CC Kuo, CF Chen, GH Yang, HJ Tsai, ... 2014 Symposium on VLSI Circuits Digest of Technical Papers, 1-2, 2014 | 70 | 2014 |
A 3T1R nonvolatile TCAM using MLC ReRAM for frequent-off instant-on filters in IoT and big-data processing MF Chang, CC Lin, A Lee, YN Chiang, CC Kuo, GH Yang, HJ Tsai, ... IEEE Journal of Solid-State Circuits 52 (6), 1664-1679, 2017 | 69 | 2017 |
An adaptively dividable dual-port BiTCAM for virus-detection processors in mobile devices CC Wang, CJ Cheng, TF Chen, JS Wang IEEE journal of solid-state circuits 44 (5), 1571-1581, 2009 | 61 | 2009 |
Low-power algorithm for automatic topology generation for application-specific networks on chips KC Chang, TF Chen IET Computers & Digital Techniques 2 (3), 239-249, 2008 | 53 | 2008 |
Method and apparatus for cooperative multithreading TF Chen, SH Chou, CJ Cheng, ZH Kang US Patent App. 11/506,805, 2008 | 53 | 2008 |
A resistance drift compensation scheme to reduce MLC PCM raw BER by over for storage class memory applications WS Khwa, MF Chang, JY Wu, MH Lee, TH Su, KH Yang, TF Chen, ... IEEE Journal of Solid-State Circuits 52 (1), 218-228, 2016 | 50 | 2016 |
Fault-tolerant gamma interconnection networks by chaining CW Chen, NP Lu, TF Chen, CP Chung IEE Proceedings-Computers and Digital Techniques 147 (2), 75-81, 2000 | 47 | 2000 |
Llm4ts: Aligning pre-trained llms as data-efficient time-series forecasters C Chang, WY Wang, WC Peng, TF Chen arXiv preprint arXiv:2308.08469, 2023 | 34 | 2023 |