| Breaking the von Neumann bottleneck: architecture-level processing-in-memory technology X Zou, S Xu, X Chen, L Yan, Y Han Science China Information Sciences 64 (6), 1-10, 2021 | 187 | 2021 |
| Ferroelectric FETs-Based Nonvolatile Logic-in-Memory Circuits X Yin, X Chen, M Niemier, XS Hu IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2018 | 110 | 2018 |
| A deep learning approach for blind drift calibration of sensor networks Y Wang, A Yang, X Chen, P Wang, Y Wang, H Yang IEEE Sensors Journal 17 (13), 4158-4171, 2017 | 100 | 2017 |
| NICSLU: An adaptive sparse matrix solver for parallel circuit simulation X Chen, Y Wang, H Yang IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2013 | 99 | 2013 |
| GPU-accelerated sparse LU factorization for circuit simulation with performance modeling X Chen, L Ren, Y Wang, H Yang IEEE Transactions on Parallel and Distributed Systems 26 (3), 786-795, 2015 | 95 | 2015 |
| On the efficacy of input vector control to mitigate NBTI effects and leakage power Y Wang, X Chen, W Wang, V Balakrishnan, Y Cao, Y Xie, H Yang 2009 10th International Symposium on Quality Electronic Design, 19-26, 2009 | 95 | 2009 |
| Computing with ferroelectric FETs: Devices, models, systems, and applications A Aziz, ET Breyer, A Chen, X Chen, S Datta, SK Gupta, M Hoffmann, ... Design, Automation & Test in Europe Conference & Exhibition (DATE), 2018 …, 2018 | 90 | 2018 |
| Leakage power and circuit aging cooptimization by gate replacement techniques Y Wang, X Chen, W Wang, Y Cao, Y Xie, H Yang Very Large Scale Integration (VLSI) Systems, IEEE Transactions on, 1-14, 2010 | 85 | 2010 |
| MNSIM 2.0: A Behavior-Level Modeling Tool for Memristor-based Neuromorphic Computing Systems Z Zhu, H Sun, K Qiu, L Xia, G Krishnan, G Dai, D Niu, X Chen, XS Hu, ... Proceedings of the 2020 on Great Lakes Symposium on VLSI, 83-88, 2020 | 82 | 2020 |
| Design and optimization of FeFET-based crossbars for binary convolution neural networks X Chen, X Yin, M Niemier, XS Hu Design, Automation & Test in Europe Conference & Exhibition (DATE), 2018 …, 2018 | 76 | 2018 |
| Chaotic Weights: A Novel Approach to Protect Intellectual Property of Deep Neural Networks N Lin, X Chen, H Lu, X Li IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2020 | 73 | 2020 |
| Hardware trojan detection in third-party digital intellectual property cores by multilevel feature analysis X Chen, Q Liu, S Yao, J Wang, Q Xu, Y Wang, Y Liu, H Yang IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2017 | 71 | 2017 |
| An escheduler-based data dependence analysis and task scheduling for parallel circuit simulation X Chen, W Wu, Y Wang, H Yu, H Yang IEEE Transactions on Circuits and Systems II: Express Briefs 58 (10), 702-706, 2011 | 66 | 2011 |
| PIMSim: A Flexible and Detailed Processing-in-Memory Simulator S Xu, X Chen, Y Wang, Y Han, X Qian, X Li IEEE Computer Architecture Letters 18 (1), 6-9, 2019 | 65 | 2019 |
| FTT-NAS: Discovering Fault-Tolerant Neural Architecture X Ning, G Ge, W Li, Z Zhu, Y Zheng, X Chen, Z Gao, Y Wang, H Yang arXiv preprint arXiv:2003.10375, 2020 | 58* | 2020 |
| Long live TIME: improving lifetime for training-in-memory engines by structured gradient sparsification Y Cai, Y Lin, L Xia, X Chen, S Han, Y Wang, H Yang Proceedings of the 55th Annual Design Automation Conference, 107, 2018 | 56 | 2018 |
| Blind drift calibration of sensor networks using sparse Bayesian learning Y Wang, A Yang, Z Li, X Chen, P Wang, H Yang IEEE Sensors Journal 16 (16), 6249-6260, 2016 | 56 | 2016 |
| Sparse LU factorization for parallel circuit simulation on GPU L Ren, X Chen, Y Wang, C Zhang, H Yang Design Automation Conference (DAC), 2012 49th ACM/EDAC/IEEE, 1125-1130, 2012 | 54 | 2012 |
| FASTrust: Feature analysis for third-party IP trust verification S Yao, X Chen, J Zhang, Q Liu, J Wang, Q Xu, Y Wang, H Yang Test Conference (ITC), 2015 IEEE International, 1-10, 2015 | 53 | 2015 |
| Mixed size crossbar based RRAM CNN accelerator with overlapped mapping method Z Zhu, J Lin, M Cheng, L Xia, H Sun, X Chen, Y Wang, H Yang Proceedings of the International Conference on Computer-Aided Design, 69, 2018 | 48 | 2018 |
Yu Wang (汪玉)Department of Electronic Engineering, Tsinghua University, ChinaPotvrđena adresa e-pošte na mail.tsinghua.edu.cn