| Sensitive and specific multi-cancer detection and localization using methylation signatures in cell-free DNA MC Liu, GR Oxnard, EA Klein, C Swanton, MV Seiden, CCGA-Consortium Annals of Oncology, 2020 | 1167 | 2020 |
| Symbolic analysis for improving simulation coverage of Simulink/Stateflow models R Alur, A Kanade, S Ramesh, KC Shashidhar Proceedings of the 8th ACM international conference on Embedded software, 89-98, 2008 | 120 | 2008 |
| Generating and analyzing symbolic traces of Simulink/Stateflow models A Kanade, R Alur, F Ivančić, S Ramesh, S Sankaranarayanan, ... Computer Aided Verification, 430-445, 2009 | 69 | 2009 |
| Automatic test case generation from Simulink/Stateflow models using model checking S Mohalik, AA Gadkari, A Yeolekar, KC Shashidhar, S Ramesh Software Testing, Verification and Reliability 24 (2), 155-180, 2014 | 63 | 2014 |
| AutoMOTGen: Automatic model oriented test generator for embedded control systems A Gadkari, A Yeolekar, J Suresh, S Ramesh, S Mohalik, KC Shashidhar Computer Aided Verification, 204-208, 2008 | 54* | 2008 |
| Verification of source code transformations by program equivalence checking KC Shashidhar, M Bruynooghe, F Catthoor, G Janssens Compiler Construction, 137-137, 2005 | 48 | 2005 |
| Functional equivalence checking for verification of algebraic transformations on array-intensive source code KC Shashidhar, M Bruynooghe, F Catthoor, G Janssens Design, Automation and Test in Europe, 1310-1315, 2005 | 46 | 2005 |
| Automatic generation of test-cases using model checking for sl/sf models AA Gadkari, S Mohalik, K Shashidhar, A Yeolekar, J Suresh, S Ramesh Proceedings of the 4th model-driven engineering, verification and validation …, 2007 | 29 | 2007 |
| Geometric Model Checking: An Automatic Verification Technique for Loop and Data Reuse Transformations KC Shashidhar, M Bruynooghe, F Catthoor, G Janssens Electronic Notes in Theoretical Computer Science 65 (2), 67-82, 2002 | 26 | 2002 |
| CLSE: Closed-loop symbolic execution R Majumdar, I Saha, KC Shashidhar, Z Wang NASA Formal Methods: 4th International Symposium, NFM 2012, Norfolk, VA, USA …, 2012 | 22 | 2012 |
| Iterative refinement of specification for component based embedded systems M Shahbaz, KC Shashidhar, R Eschbach Proceedings of the 2011 International Symposium on Software Testing and …, 2011 | 22 | 2011 |
| Testing model-processing tools for embedded systems P Sampath, AC Rajeev, S Ramesh, KC Shashidhar 13th IEEE Real Time and Embedded Technology and Applications Symposium (RTAS …, 2007 | 22 | 2007 |
| Efficient automatic verification of loop and data-flow transformations by functional equivalence checking KC Shashidhar PhD thesis, Department of Computer Science, Katholieke Universiteit Leuven …, 2008 | 16 | 2008 |
| An automatic verification technique for loop and data reuse transformations based on geometric modeling of programs KC Shashidhar, M Bruynooghe, F Catthoor, G Janssens Journal of Universal Computer Science 9 (3), 248-269, 2003 | 14 | 2003 |
| CoGenTe: A tool for code generator testing AC Rajeev, P Sampath, KC Shashidhar, S Ramesh Proceedings of the 25th IEEE/ACM International Conference on Automated …, 2010 | 13 | 2010 |
| Behaviour directed testing of auto-code generators P Sampath, AC Rajeev, S Ramesh, KC Shashidhar 2008 Sixth IEEE International Conference on Software Engineering and Formal …, 2008 | 10 | 2008 |
| Integrating Software Safety and Product Line Engineering using Formal Methods: Challenges and Opportunities M Becker, S Kemmann, KC Shashidhar 1st International Workshop on Formal Methods in Software Product Line …, 2010 | 9 | 2010 |
| Automatic functional verification of memory oriented global source code transformations KC Shashidhar, M Bruynooghe, F Catthoor, G Janssens High-Level Design Validation and Test Workshop, 2003. Eighth IEEE …, 2003 | 9 | 2003 |
| Low power design of turbo decoder module with exploration of energy-performance trade-offs KC Shashidhar, A Vandecappelle, F Catthoor 2nd Workshop on Compilers and Operating Systems for Low Power (COLP) in …, 2001 | 9 | 2001 |
| Specification inference using systematic reverse-engineering methodologies: An automotive industry application M Shahbaz, KC Shashidhar, R Eschbach IEEE software 29 (6), 62-69, 2011 | 8 | 2011 |
Ramesh S.formerly Professor of Computer Science, IIT Bombay, now Technical Fellow, General Motors R&DPotvrđena adresa e-pošte na iitbombay.org