Evaluation of Blue Gene/Q hardware support for transactional memories A Wang, M Gaudet, P Wu, JN Amaral, M Ohmacht, C Barton, R Silvera, ... Proceedings of the 21st international conference on Parallel architectures …, 2012 | 286 | 2012 |
Subsampling for efficient and effective unsupervised outlier detection ensembles A Zimek, M Gaudet, RJGB Campello, J Sander Proceedings of the 19th ACM SIGKDD international conference on Knowledge …, 2013 | 247 | 2013 |
Quantitative comparison of hardware transactional memory for Blue Gene/Q, zEnterprise EC12, Intel Core, and POWER8 T Nakaike, R Odaira, M Gaudet, MM Michael, H Tomari ACM SIGARCH Computer Architecture News 43 (3S), 144-157, 2015 | 138 | 2015 |
Multi-dimensional evaluation of Haswell's transactional memory performance MM Pereira, M Gaudet, JN Amaral, G Araújo 2014 IEEE 26th International Symposium on Computer Architecture and High …, 2014 | 13 | 2014 |
Software support and evaluation of hardware transactional memory on blue gene/q A Wang, M Gaudet, P Wu, M Ohmacht, JN Amaral, C Barton, R Silvera, ... IEEE Transactions on Computers 64 (1), 233-246, 2013 | 11 | 2013 |
Study of hardware transactional memory characteristics and serialization policies on Haswell MM Pereira, M Gaudet, JN Amaral, G Araujo Parallel Computing 54, 46-58, 2016 | 10 | 2016 |
Software variability through c++ static polymorphism: A case study of challenges and open problems in eclipse omr SA Masri, NU Bhuiyan, S Nadi, M Gaudet Proceedings of the 27th Annual International Conference on Computer Science …, 2017 | 9 | 2017 |
Rebuilding an airliner in flight: A retrospective on refactoring IBM Testarossa production compiler for Eclipse OMR M Gaudet, M Stoodley Proceedings of the 8th International Workshop on Virtual Machines and …, 2016 | 9 | 2016 |
Using static analysis to support variability implementation decisions in C++ SAL Masri, S Nadi, M Gaudet, X Liang, RW Young Proceedings of the 22nd International Systems and Software Product Line …, 2018 | 3 | 2018 |
Serialization management driven performance in best-effort hardware transactional memory systems M Gaudet | 3 | 2014 |
CacheIR: The Benefits of a Structured Representation for Inline Caches J de Mooij, M Gaudet, I Ireland, N Henderson, JN Amaral Proceedings of the 20th ACM SIGPLAN International Conference on Managed …, 2023 | 2 | 2023 |
Stub Folding: Retaining Type Specialization to Increase the Efficiency of Highly Polymorphic Inline Caches N Henderson, I Ireland, M Gaudet, JPL De Carvalho, JN Amaral Proceedings of the 33rd Annual International Conference on Computer Science …, 2023 | 1 | 2023 |
Transactional event profiling in a best-effort hardware transactional memory system M Gaudet, JN Amaral Proceedings of the 21st international conference on Parallel architectures …, 2012 | 1 | 2012 |
Software Variability Through C++ Static Polymorphism SAL Masri, NU Bhuiyan, S Nadi, M Gaudet | | 2017 |
Rebuilding an Airliner in Flight M Gaudet, M Stoodley VMIL’16, 24, 2016 | | 2016 |
Serialization Management for Best-Effort Hardware Transactional Memory M Gaudet, G Araujo, JN Amaral 2015 27th International Symposium on Computer Architecture and High …, 2015 | | 2015 |