A reconfigurable fabric for accelerating large-scale datacenter services A Putnam, AM Caulfield, ES Chung, D Chiou, K Constantinides, J Demme, ...
ACM SIGARCH Computer Architecture News 42 (3), 13-24, 2014
1598 2014 A cloud-scale acceleration architecture AM Caulfield, ES Chung, A Putnam, H Angepat, J Fowers, M Haselman, ...
2016 49th Annual IEEE/ACM international symposium on microarchitecture …, 2016
917 2016 Accelerating deep convolutional neural networks using specialized hardware K Ovtcharov, O Ruwase, JY Kim, J Fowers, K Strauss, ES Chung
Microsoft Research Whitepaper 2, 2015
543 2015 A reconfigurable fabric for accelerating large-scale datacenter services A Putnam, AM Caulfield, ES Chung, D Chiou, K Constantinides, J Demme, ...
IEEE Micro 35 (3), 10-22, 2015
182 2015 A 201.4 GOPS 496 mW real-time multi-object recognition processor with bio-inspired neural perception engine JY Kim, M Kim, S Lee, J Oh, K Kim, HJ Yoo
IEEE Journal of Solid-State Circuits 45 (1), 32-45, 2009
157 2009 A scalable high-bandwidth architecture for lossless compression on fpgas J Fowers, JY Kim, D Burger, S Hauck
2015 IEEE 23rd Annual International Symposium on Field-Programmable Custom …, 2015
134 2015 Convolutional neural networks on hardware accelerators E Chung, K Strauss, K Ovtcharov, JY Kim, O Ruwase
US Patent App. 14/754,367, 2016
123 2016 Toward accelerating deep learning at scale using specialized hardware in the datacenter K Ovtcharov, O Ruwase, JY Kim, J Fowers, K Strauss, ES Chung
2015 IEEE Hot Chips 27 Symposium (HCS), 1-38, 2015
92 2015 A 125 GOPS 583 mW network-on-chip based parallel processor with bio-inspired visual attention engine K Kim, S Lee, JY Kim, M Kim, HJ Yoo
IEEE Journal of Solid-State Circuits 44 (1), 136-147, 2008
92 2008 Bitwise competition logic for compact digital comparator JY Kim, HJ Yoo
2007 IEEE Asian Solid-State Circuits Conference, 59-62, 2007
77 2007 Dfx: A low-latency multi-fpga appliance for accelerating transformer-based text generation S Hong, S Moon, J Kim, S Lee, M Kim, D Lee, JY Kim
2022 55th IEEE/ACM International Symposium on Microarchitecture (MICRO), 616-630, 2022
69 2022 Familiarity based unified visual attention model for fast and robust object recognition S Lee, K Kim, JY Kim, M Kim, HJ Yoo
Pattern Recognition 43 (3), 1116-1128, 2010
62 2010 A reconfigurable fabric for accelerating large-scale datacenter services A Putnam, AM Caulfield, ES Chung, D Chiou, K Constantinides, J Demme, ...
Communications of the ACM 59 (11), 114-122, 2016
58 2016 An overview of processing-in-memory circuits for artificial intelligence and machine learning D Kim, C Yu, S Xie, Y Chen, JY Kim, B Kim, JP Kulkarni, TTH Kim
IEEE Journal on Emerging and Selected Topics in Circuits and Systems 12 (2 …, 2022
56 2022 Configurable clouds AM Caulfield, ES Chung, A Putnam, H Angepat, D Firestone, J Fowers, ...
IEEE Micro 37 (3), 52-61, 2017
53 2017 Z-PIM: A sparsity-aware processing-in-memory architecture with fully variable weight bit-precision for energy-efficient deep neural networks JH Kim, J Lee, J Lee, J Heo, JY Kim
IEEE Journal of Solid-State Circuits 56 (4), 1093-1104, 2021
50 2021 An 81.6 GOPS object recognition processor based on NoC and visual image processing memory D Kim, K Kim, JY Kim, S Lee, HJ Yoo
2007 IEEE Custom Integrated Circuits Conference, 443-446, 2007
49 2007 Solutions for real chip implementation issues of NoC and their application to memory-centric NoC D Kim, K Kim, JY Kim, SJ Lee, HJ Yoo
First International Symposium on Networks-on-Chip (NOCS'07), 30-39, 2007
46 2007 24-GOPS 4.5- S Lee, M Kim, K Kim, JY Kim, HJ Yoo
IEEE transactions on neural networks 22 (1), 64-73, 2010
34 2010 A 118.4 gb/s multi-casting network-on-chip with hierarchical star-ring combined topology for real-time object recognition JY Kim, J Park, S Lee, M Kim, J Oh, HJ Yoo
IEEE Journal of Solid-State Circuits 45 (7), 1399-1409, 2010
31 2010 
Eric S ChungVP of AI Computing, NVIDIAE-mail megerősítve itt: nvidia.com