Követés
Ali Jahanian
Ali Jahanian
Associate Professor at Shahid Beheshti University
E-mail megerősítve itt: sbu.ac.ir - Kezdőlap
Cím
Hivatkozott rá
Hivatkozott rá
Év
Improved CMOS (4; 2) compressor designs for parallel multipliers
A Pishvaie, G Jaberipur, A Jahanian
Computers & Electrical Engineering 38 (6), 1703-1716, 2012
642012
High-performance CMOS (4: 2) compressors
A Pishvaie, G Jaberipur, A Jahanian
International journal of electronics 101 (11), 1511-1525, 2014
412014
Prediction and reduction of routing congestion
M Saeedi, MS Zamani, A Jahanian
Proceedings of the 2006 international symposium on Physical design, 72-77, 2006
332006
Redesigned CMOS (4; 2) compressor for fast binary multipliers
A Pishvaie, G Jaberipur, A Jahanian
Canadian Journal of Electrical and Computer Engineering 36 (3), 111-115, 2013
302013
A fast placement algorithm for embedded just-in-time reconfigurable extensible processing platform
H Daryanavard, M Eshghi, A Jahanian
The Journal of Supercomputing 71, 121-143, 2015
132015
Automatic netlist scrambling methodology in ASIC design flow to hinder the reverse engineering
S Zamanzadeh, A Jahanian
2013 IFIP/IEEE 21st International Conference on Very Large Scale Integration …, 2013
132013
Higher security of ASIC fabrication process against reverse engineering attack using automatic netlist encryption methodology
S Zamanzadeh, A Jahanian
Microprocessors and Microsystems 42, 1-9, 2016
122016
Area efficient, low power and robust design for add-compare-select units
MK Akbari, AH Jahanian, M Naderi, B Javadi
Euromicro Symposium on Digital System Design, 2004. DSD 2004., 611-614, 2004
122004
Power side-channel leakage assessment and locating the exact sources of leakage at the early stages of ASIC design process
V Samadi Bokharaie, A Jahanian
The Journal of Supercomputing, 1-26, 2022
112022
Layout vulnerability reduction against Trojan insertion using security-aware white space distribution
H Hossein-Talaee, A Jahanian
2017 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 551-555, 2017
102017
DENA: A configurable microarchitecture and design flow for biomedical DNA-based logic design
Z Beiki, A Jahanian
IEEE transactions on biomedical circuits and systems 11 (5), 1077-1086, 2017
102017
A general-purpose field-programmable pin-constrained digital microfluidic biochip
A Abdoli, A Jahanian
2015 18th CSI International Symposium on Computer Architecture and Digital …, 2015
102015
Higher Flexibililty of Recon gurable Digital Micro/Nano Fluidic Biochips using an FPGA-Inspired Architecture
M Taajobian, A Jahanian
Scientia Iranica 23 (3), 1554-1562, 2016
92016
ParSA: parallel simulated annealing placement algorithm for multi-core systems
M Sanjabi, A Jahanian, S Amanollahi, N Miralaei
The 16th CSI International Symposium on Computer Architecture and Digital …, 2012
92012
EduCAD: An efficient, flexible and easily revisable physical design tool for educational purposes
S Amanollahi, A Jahanian
design, automation and test in Europe university booth (DATE), 130-131, 2011
92011
Multi-domain clock skew scheduling-aware register placement to optimize clock distribution network
N MohammadZadeh, M Mirsaeedi, A Jahanian, MS Zamani
2009 Design, Automation & Test in Europe Conference & Exhibition, 833-838, 2009
92009
Multi‐threshold and multi‐input DNA logic design style for profiling the microRNA biomarkers of real cancers
M Sanjabi, A Jahanian
IET nanobiotechnology 13 (7), 665-673, 2019
82019
Fault-tolerant architecture and CAD algorithm for field-programmable pin-constrained digital microfluidic biochips
A Abdoli, A Jahanian
2015 CSI symposium on real-time and embedded systems and technologies (RTEST …, 2015
82015
Improved Line Tracking System for Autonomous Navigation of High-Speed Vehicle
YZ Khafri, A Jahanian
IAES International Journal of Robotics and Automation 1 (3), 163, 2012
82012
Evaluation, prediction and reduction of routing congestion
M Saeedi, MS Zamani, A Jahanian
Microelectronics journal 38 (8-9), 942-958, 2007
82007
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Cikkek 1–20