| Sampling rate impact on energy consumption of biomedical signal processing systems A Tobola, FJ Streit, C Espig, O Korpok, C Sauter, N Lang, B Schmitz, ... 2015 IEEE 12th International Conference on Wearable and Implantable Body …, 2015 | 44 | 2015 |
| Scalable ECG hardware and algorithms for extended runtime of wearable sensors A Tobola, C Espig, FJ Streit, O Korpok, B Schmitz, C Hofmann, M Struck, ... 2015 IEEE International Symposium on Medical Measurements and Applications …, 2015 | 21 | 2015 |
| Model-based design automation of hardware/software co-designs for Xilinx Zynq PSoCs FJ Streit, M Letras, S Wildermann, B Hackenberg, J Falk, A Becher, ... 2018 international conference on ReConFigurable computing and FPGAs …, 2018 | 16 | 2018 |
| Secure boot from non-volatile memory for programmable SoC architectures FJ Streit, F Fritz, A Becher, S Wildermann, S Werner, M Schmidt-Korth, ... 2020 IEEE International Symposium on Hardware Oriented Security and Trust …, 2020 | 14 | 2020 |
| High-level synthesis for hardware/software co-design of distributed smart camera systems FJ Streit, M Letras, M Schid, J Falk, S Wildermann, J Teich Proceedings of the 11th international conference on distributed smart …, 2017 | 8 | 2017 |
| Vision-based path construction and maintenance for indoor guidance of autonomous ground vehicles based on collaborative smart cameras FJ Streit, MJH Pantho, C Bobda, C Roullet Proceedings of the 10th International Conference on Distributed Smart Camera …, 2016 | 7 | 2016 |
| Data acquisition and control at the edge: a hardware/software-reconfigurable approach F Streit, S Wituschek, M Pschyklenk, A Becher, M Lechner, S Wildermann, ... Production Engineering 14, 365-371, 2020 | 6 | 2020 |
| Choice–A tunable PUF-design for FPGAs FJ Streit, P Krüger, A Becher, J Schlumberger, S Wildermann, J Teich 2021 31st International Conference on Field-Programmable Logic and …, 2021 | 5 | 2021 |
| Compiler-based high-level synthesis of application-specific processors on FPGAs P Plagwitz, FJ Streit, A Becher, S Wildermann, J Teich 2019 international conference on ReConFigurable computing and FPGAs …, 2019 | 5 | 2019 |
| Design and evaluation of a tunable PUF architecture for FPGAs FJ Streit, P Krüger, A Becher, S Wildermann, J Teich ACM Transactions on Reconfigurable Technology and Systems (TRETS) 15 (1), 1-27, 2021 | 4 | 2021 |
| Providing tamper-secure SoC updates through reconfigurable hardware FJ Streit, S Wildermann, M Pschyklenk, J Teich Applied Reconfigurable Computing. Architectures, Tools, and Applications …, 2021 | 3 | 2021 |
| Techniques to Secure HW/SW-Programmable SoC Architectures for Edge Computing FJ Streit PQDT-Global, 2023 | | 2023 |
Jürgen TeichFull Professor, Computer Science, Friedrich-Alexander-Universität Erlangen-NürnbergEmail yang diverifikasi di cs.fau.de