A New Heuristic for A Kole, K Datta, I Sengupta
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2017
75 2017 A Heuristic for Linear Nearest Neighbor Realization of Quantum Circuits by SWAP Gate Insertion Using A Kole, K Datta, I Sengupta
IEEE journal on emerging and selected topics in circuits and systems 6 (1 …, 2016
69 2016 Improved mapping of quantum circuits to IBM QX architectures A Kole, S Hillmich, K Datta, R Wille, I Sengupta
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2019
42 2019 Exact synthesis of ternary reversible functions using ternary Toffoli gates A Kole, PMN Rani, K Datta, I Sengupta, R Drechsler
2017 IEEE 47th International Symposium on Multiple-Valued Logic (ISMVL), 179-184, 2017
13 2017 Improved NCV gate realization of arbitrary size Toffoli gates A Kole, K Datta
2017 30th International Conference on VLSI Design and 2017 16th …, 2017
13 2017 Realization of ternary reversible circuits using improved gate library PMN Rani, A Kole, K Datta, A Chakrabarty
Procedia Computer Science 93, 153-160, 2016
13 2016 Towards a cost metric for nearest neighbor constraints in reversible circuits A Kole, K Datta, I Sengupta, R Wille
Reversible Computation: 7th International Conference, RC 2015, Grenoble …, 2015
9 2015 Design of efficient quantum circuits using nearest neighbor constraint in 2D architecture L Marbaniang, A Kole, K Datta, I Sengupta
International conference on reversible computation, 248-253, 2017
8 2017 Nearest neighbor mapping of quantum circuits to two-dimensional hexagonal qubit architecture K Datta, A Kole, I Sengupta, R Drechsler
2022 IEEE 52nd International Symposium on Multiple-Valued Logic (ISMVL), 35-42, 2022
6 2022 Complete and efficient verification for a RISC-V processor using formal verification L Weingarten, K Datta, A Kole, R Drechsler
2024 Design, Automation & Test in Europe Conference & Exhibition (DATE), 1-6, 2024
5 2024 Improved Cost-Metric for Nearest Neighbor Mapping of Quantum Circuits to 2-Dimensional Hexagonal Architecture K Datta, A Kole, I Sengupta, R Drechsler
International Conference on Reversible Computation, 218-231, 2023
5 2023 Improved decomposition of multiple-control ternary Toffoli gates using Muthukrishnan-Stroud quantum gates PMN Rani, A Kole, K Datta, I Sengupta
International Conference on Reversible Computation, 202-213, 2017
5 2017 Extending the design space of dynamic quantum circuits for Toffoli based network A Kole, A Deb, K Datta, R Drechsler
2023 Design, Automation & Test in Europe Conference & Exhibition (DATE), 1-6, 2023
4 2023 Mapping quantum circuits to 2-dimensional quantum architectures K Datta, A Kole, I Sengupta, R Drechsler
Gesellschaft für Informatik, Bonn, 2022
4 2022 Dynamic realization of multiple control Toffoli gate A Kole, A Deb, K Datta, R Drechsler
2024 Design, Automation & Test in Europe Conference & Exhibition (DATE), 1-6, 2024
3 2024 Resource optimal realization of fault-tolerant quantum circuit A Kole, I Sengupta
2020 IEEE International Test Conference India, 1-10, 2020
3 2020 A ternary decision diagram (TDD)-based synthesis approach for ternary logic circuits PMN Rani, A Kole, K Datta
Journal of The Institution of Engineers (India): Series B 100, 295-307, 2019
3 2019 SAT-based Exact Synthesis of Ternary Reversible Circuits using a Functionally Complete Gate Library A Kole, K Datta, I Sengupta, R Drechsler
2022 25th Euromicro Conference on Digital System Design (DSD), 769-776, 2022
2 2022 In-Memory SAT-Solver for Self-Verification of Programmable Memristive Architectures F Shirinzadeh, A Deb, S Shirinzadeh, A Kole, K Datta, R Drechsler
2024 37th International Conference on VLSI Design and 2024 23rd …, 2024
1 2024 AQuCiDe: Architecture Aware Decomposition of Quantum Circuits S Sengupta, A Kole, K Datta, I Sengupta, R Drechsler
Quantum Computing: Circuits, Systems, Automation and Applications, 69-87, 2023
1 2023 
Kamalika DattaUniversity of Bremen and DFKIEmail verificata su uni-bremen.de