Mi6: Secure enclaves in a speculative out-of-order processor T Bourgeat, I Lebedev, A Wright, S Zhang, Arvind, S Devadas Proceedings of the 52nd Annual IEEE/ACM International Symposium on …, 2019 | 183 | 2019 |
GraFBoost: Using accelerated flash storage for external graph analytics SW Jun, A Wright, S Zhang, S Xu 2018 ACM/IEEE 45th Annual International Symposium on Computer Architecture …, 2018 | 127 | 2018 |
Composable building blocks to open up processor design S Zhang, A Wright, T Bourgeat, A Arvind 2018 51st Annual IEEE/ACM International Symposium on Microarchitecture …, 2018 | 48 | 2018 |
Proteus: Language and runtime support for self-adaptive software development S Barati, FA Bartha, S Biswas, R Cartwright, A Duracz, D Fussell, ... IEEE Software 36 (2), 73-82, 2019 | 22 | 2019 |
Arvind,“ S Zhang, M Vijayaraghavan, A Wright, M Alipour Constructing a weak memory model,” in ISCA, 2018 | 15 | 2018 |
Hgum: Messaging framework for hardware accelerators S Zhang, H Angepat, D Chiou 2017 International Conference on ReConFigurable Computing and FPGAs …, 2017 | 13 | 2017 |
Weak memory models: Balancing definitional simplicity and implementation flexibility S Zhang, M Vijayaraghavan 2017 26th International Conference on Parallel Architectures and Compilation …, 2017 | 10 | 2017 |
BigSparse: High-performance external graph analytics SW Jun, A Wright, S Zhang, S Xu arXiv preprint arXiv:1710.07736, 2017 | 5 | 2017 |
Arvind, and Srinivas Devadas T Bourgeat, IA Lebedev, A Wright, S Zhang MI6: secure enclaves in a speculative out-of-order processor, 2018 | 4 | 2018 |
Constructing a weak memory model S Zhang, M Vijayaraghavan, A Wright, M Alipour 2018 ACM/IEEE 45th Annual International Symposium on Computer Architecture …, 2018 | 3 | 2018 |
Arvind, and Devadas S.,“ T Bourgeat, I Lebedev, A Wright, S Zhang MI6: Secure enclaves in a speculative out-of-order processor,” in Proc. 52nd …, 2019 | 2 | 2019 |
Constructing and evaluating weak memory models S Zhang Massachusetts Institute of Technology, 2019 | 2 | 2019 |
Validating simplified processor models in architectural studies S Zhang, A Wright, D Sanchez arXiv preprint arXiv:1610.02094, 2016 | 2 | 2016 |
Weak Memory Models with Matching Axiomatic and Operational Definitions S Zhang, M Vijayaraghavan, D Lustig arXiv preprint arXiv:1710.04259, 2017 | 1 | 2017 |
Taming Weak Memory Models S Zhang, M Vijayaraghavan arXiv preprint arXiv:1606.05416, 2016 | 1 | 2016 |
Hgum: Messaging framework for hardware accelerators (abstact only) S Zhang, H Angepat, D Chiou Proceedings of the 2016 ACM/SIGDA International Symposium on Field …, 2016 | 1 | 2016 |
MI6 T Bourgeat, I Lebedev, A Wright, S Zhang Proceedings of the 52nd Annual IEEE/ACM International Symposium on …, 2019 | | 2019 |
An Operational Framework for Specifying Memory Models using Instantaneous Instruction Execution S Zhang, M Vijayaraghavan arXiv preprint arXiv:1705.06158, 2017 | | 2017 |
WMM: a Resilient Weak Memory Model S Zhang Massachusetts Institute of Technology, 2016 | | 2016 |