Deep neural networks with weighted spikes J Kim, H Kim, S Huh, J Lee, K Choi
Neurocomputing 311, 373-386, 2018
157 2018 Minimizing leakage power in sequential circuits by using mixed Vt flip-flops J Kim, Y Shin
2007 IEEE/ACM International Conference on Computer-Aided Design, 797-802, 2007
16 2007 VCAM: Variation compensation through activation matching for analog binarized neural networks J Kim, C Lee, J Kim, Y Kim, CS Hwang, K Choi
2019 IEEE/ACM International Symposium on Low Power Electronics and Design …, 2019
13 2019 Minimizing leakage power of sequential circuits through mixed-Vt flip-flops and multi-Vt combinational gates J Kim, C Oh, Y Shin
ACM Transactions on Design Automation of Electronic Systems (TODAES) 15 (1 …, 2009
7 2009 Skewed flip-flop transformation for minimizing leakage in sequential circuits J Seomun, J Kim, Y Shin
Proceedings of the 44th annual Design Automation Conference, 103-106, 2007
5 2007 Energy efficient analog synapse/neuron circuit for binarized neural networks J Kim, C Lee, K Choi
2018 International SoC Design Conference (ISOCC), 271-272, 2018
4 2018 Skewed Flip-Flop and Mixed- J Seomun, JH Kim, Y Shin
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2008
3 2008 Fast Simulation Method for Analog Deep Binarized Neural Networks C Lee, J Kim, J Kim, CS Hwang, K Choi
2019 International SoC Design Conference (ISOCC), 293-294, 2019
1 2019 Dynamic clock synchronization scheme between voltage domains in multi-core architecture J Kim, K Choi, S Lee, S Ryu
2016 IFIP/IEEE International Conference on Very Large Scale Integration …, 2016
1 2016 An RRAM-based Analog Neuron Design for the Weighted Spiking Neural network C Lee, J Kim, K Choi
2019 International SoC Design Conference (ISOCC), 259-260, 2019
2019 