| Adaptive guardband scheduling to improve system-level efficiency of the POWER7+ Y Zu, CR Lefurgy, J Leng, M Halpern, MS Floyd, VJ Reddi Proceedings of the 48th International Symposium on Microarchitecture, 308-321, 2015 | 71 | 2015 |
| Flying iot: Toward low-power vision in the sky H Genc, Y Zu, TW Chin, M Halpern, VJ Reddi IEEE micro 37 (6), 40-51, 2017 | 62 | 2017 |
| GPU voltage noise: Characterization and hierarchical smoothing of spatial and temporal voltage noise interference in GPU architectures J Leng, Y Zu, VJ Reddi 2015 IEEE 21st International Symposium on High Performance Computer …, 2015 | 61 | 2015 |
| GPUVolt: Modeling and characterizing voltage noise in GPU architectures J Leng, Y Zu, M Rhu, M Gupta, VJ Reddi Proceedings of the 2014 international symposium on Low power electronics and …, 2014 | 48 | 2014 |
| Voltage-stacked GPUs: A control theory driven cross-layer solution for practical voltage stacking in GPUs A Zou, J Leng, X He, Y Zu, CD Gill, VJ Reddi, X Zhang 2018 51st Annual IEEE/ACM International Symposium on Microarchitecture …, 2018 | 29 | 2018 |
| Ti-states: Processor power management in the temperature inversion region Y Zu, W Huang, I Paul, VJ Reddi 2016 49th Annual IEEE/ACM International Symposium on Microarchitecture …, 2016 | 27 | 2016 |
| Exploring the limits of Concurrency in ML Training on Google TPUs S Kumar, Y Wang, C Young, J Bradbury, N Kumar, D Chen, A Swing Proceedings of Machine Learning and Systems 3, 81-92, 2021 | 22 | 2021 |
| Ivory: Early-stage design space exploration tool for integrated voltage regulators A Zou, J Leng, Y Zu, T Tong, VJ Reddi, D Brooks, GY Wei, X Zhang Proceedings of the 54th Annual Design Automation Conference 2017, 1-6, 2017 | 19 | 2017 |
| Efficient and reliable power delivery in voltage-stacked manycore system with hybrid charge-recycling regulators A Zou, J Leng, X He, Y Zu, VJ Reddi, X Zhang Proceedings of the 55th Annual Design Automation Conference, 1-6, 2018 | 16 | 2018 |
| Energy efficiency benefits of reducing the voltage guardband on the Kepler GPU architecture J Leng, Y Zu, VJ Reddi Workshop on Silicon Errors in Logic-System Effects (SELSE), 2014 | 13 | 2014 |
| Voltage-stacked power delivery systems: Reliability, efficiency, and power management A Zou, J Leng, X He, Y Zu, CD Gill, VJ Reddi, X Zhang IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2020 | 11 | 2020 |
| Resiliency at Scale: Managing {Google’s}{TPUv4} Machine Learning Supercomputer Y Zu, A Ghaffarkhah, HV Dang, B Towles, S Hand, S Huda, A Bello, ... 21st USENIX Symposium on Networked Systems Design and Implementation (NSDI …, 2024 | 10 | 2024 |
| Determination and correction of physical circuit event related errors of a hardware design P Bose, A Buyuktosunoglu, S Eldridge, KV Swaminathan, Y Zu US Patent 10,365,327, 2019 | 10 | 2019 |
| Statistical analysis of indicators of internationalization for key higher education institutions in China Y Cheng, M Zhang, Y Zu Journal of Higher Education 35 (8), 46-54, 2014 | 9 | 2014 |
| An efficient power-aware resource scheduling strategy in virtualized datacenters Y Zu, T Huang, Y Zhu 2013 International Conference on Parallel and Distributed Systems, 110-117, 2013 | 9 | 2013 |
| Predictive guardbanding: Program-driven timing margin reduction for GPUs J Leng, A Buyuktosunoglu, R Bertran, P Bose, Y Zu, VJ Reddi IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2020 | 7 | 2020 |
| Effect of big chuanxiong prescription extraction on preventing learning and memory dysfunction of vascular dementia rat Y Zhao, W Wang, Y Zu Information on Traditional Chinese Medicine 25 (1), 67-69, 2008 | 6 | 2008 |
| Fine-tuning the active timing margin (ATM) control loop for maximizing multi-core efficiency on an IBM POWER server Y Zu, D Richins, C Lefurgy, V Reddi 2019 IEEE International Symposium on High Performance Computer Architecture …, 2019 | 4 | 2019 |
| Method and apparatus for temperature and voltage management control W Huang, Y Zu, I Paul US Patent 10,649,514, 2020 | 3 | 2020 |
| Ti-states: Power management in active timing margin processors Y Zu, W Huang, I Paul, VJ Reddi IEEE Micro 37 (3), 106-114, 2017 | 3 | 2017 |
Vijay Janapa ReddiHarvard UniversityEmail verificata su eecs.harvard.edu
