| Acceleration of finite-difference time-domain (FDTD) using graphics processor units (GPU) SE Krakiwsky, LE Turner, MM Okoniewski 2004 IEEE MTT-S International Microwave Symposium Digest (IEEE Cat. No …, 2004 | 145 | 2004 |
| Application of FPGA technology to accelerate the finite-difference time-domain (FDTD) method RN Schneider, LE Turner, MM Okoniewski Proceedings of the 2002 ACM/SIGDA tenth international symposium on Field …, 2002 | 85 | 2002 |
| Graphics processor unit (GPU) acceleration of finite-difference time-domain (FDTD) algorithm SE Krakiwsky, LE Turner, MM Okoniewski 2004 IEEE International Symposium on Circuits and Systems (IEEE Cat. No …, 2004 | 71 | 2004 |
| Low sensitivity digital LDI ladder filters with elliptic magnitude response L Turner, B Ramesh IEEE transactions on circuits and systems 33 (7), 697-706, 1986 | 66 | 1986 |
| New limit cycle bounds for digital filters BDO Green, LE Turner IEEE Transactions on Circuits and Systems 35 (4), 365-374, 2002 | 51 | 2002 |
| Design of digital filters using simulated annealing RV Kacelenga, PJ Graumann, LE Turner IEEE international symposium on circuits and systems, 642-645, 1990 | 34 | 1990 |
| Exact synthesis of LDI and LDD ladder filters E Liu, L Turner, L Bruton IEEE transactions on circuits and systems 31 (4), 369-381, 1984 | 34 | 1984 |
| Fdtd hardware acceleration system M Okoniewski, R Schneider, L Turner US Patent App. 10/708,319, 2004 | 33 | 2004 |
| The design of peak-constrained least squares FIR filters with low-complexity finite-precision coefficients TW Fox, LE Turner IEEE Transactions on Circuits and Systems II: Analog and Digital Signal …, 2002 | 28 | 2002 |
| Digital LDI ladder design using the bilinear transformation LE Turner, ESK Liu, LT Bruton Proc. IEEE International Symposium on Circuits and Systems, 1017-1020, 1984 | 22 | 1984 |
| Finite-difference time-domain method in custom hardware? RN Schneider, MM Okoniewski, LE Turner IEEE Microwave and Wireless components letters 12 (12), 488-490, 2002 | 20 | 2002 |
| Bit-serial FIR filters with CSD coefficients for FPGAs LE Turner, PJW Graumann, SG Gibb International Workshop on Field Programmable Logic and Applications, 311-320, 1995 | 20 | 1995 |
| The analysis and implementation of digital filters using a special purpose CAD tool LE Turner, DA Graham, PB Denyer IEEE Transactions on Education 32 (3), 287-297, 1989 | 20 | 1989 |
| A software-coupled 2D FDTD hardware accelerator [electromagnetic simulation] RN Schneider, MM Okoniewski, LE Turner IEEE Antennas and Propagation Society Symposium, 2004. 2, 1692-1695, 2004 | 19 | 2004 |
| Hardware-software co-design of portable functional gastrointestinal stimulator system. T LE, M MP Journal of medical engineering & technology 27 (4), 2003 | 16 | 2003 |
| Implementation of fast Fourier transforms and discrete cosine transforms in FPGAs G Panneerselvam, PJW Graumann, LE Turner International Workshop on Field Programmable Logic and Applications, 272-281, 1995 | 14 | 1995 |
| Implementing digital signal processing algorithms using pipelined bit-serial arithmetic and field programmable gate arrays PJ Graumann, LE Turner First International ACM/SIGDA Workshop on Field Programmable Gate Arrays …, 1992 | 11 | 1992 |
| Custom hardware implementation of the finite-difference time-domain (FDTD) method RN Schneider, MM Okoniewski, LE Turner 2002 IEEE MTT-S International Microwave Symposium Digest (Cat. No. 02CH37278 …, 2002 | 10 | 2002 |
| Elimination of constant-input limit cycles in recursive digital filters using a generalised minimum norm LE Turner IEE Proceedings G (Electronic Circuits and Systems) 130 (3), 69-77, 1983 | 9 | 1983 |
| A Method for Implementing Bit-Serial Finite Impulse Response Digital Filters in FPGAs Using JBits™ A Carreira, TW Fox, LE Turner International Conference on Field Programmable Logic and Applications, 222-231, 2002 | 8 | 2002 |
