| ORION 2.0: A fast and accurate NoC power and area model for early-stage design space exploration AB Kahng, B Li, LS Peh, K Samadi 2009 Design, Automation & Test in Europe Conference & Exhibition, 423-428, 2009 | 1029 | 2009 |
| Orion 2.0: A power-area simulator for interconnection networks AB Kahng, B Li, LS Peh, K Samadi IEEE Transactions on Very Large Scale Integration (VLSI) Systems 20 (1), 191-196, 2011 | 341 | 2011 |
| 3D floorplanning using 2D and 3D blocks K Samadi, SA Panth, Y Du US Patent 9,064,077, 2015 | 244 | 2015 |
| Clock distribution network for 3D integrated circuit K Samadi, SA Panth, J Xie, Y Du US Patent 9,098,666, 2015 | 200 | 2015 |
| Flip-flops in a monolithic three-dimensional (3D) integrated circuit (IC)(3DIC) and related methods Y Du, J Xie, K Samadi US Patent 9,041,448, 2015 | 200 | 2015 |
| Snapea: Predictive early activation for reducing computation in deep convolutional neural networks V Akhlaghi, A Yazdanbakhsh, K Samadi, RK Gupta, H Esmaeilzadeh 2018 ACM/IEEE 45th Annual International Symposium on Computer Architecture …, 2018 | 198 | 2018 |
| Hard macro having blockage sites, integrated circuit including same and method of routing through a hard macro K Samadi, SA Panth, Y Du, RP Gilmore US Patent 10,192,813, 2019 | 190 | 2019 |
| Design and CAD methodologies for low power gate-level monolithic 3D ICs SA Panth, K Samadi, Y Du, SK Lim Proceedings of the 2014 international symposium on Low power electronics and …, 2014 | 147 | 2014 |
| Ganax: A unified mimd-simd acceleration for generative adversarial networks A Yazdanbakhsh, H Falahati, PJ Wolfe, H Esmaeilzadeh, K Samadi 2018 ACM/IEEE 45th annual international symposium on computer architecture …, 2018 | 117 | 2018 |
| OpenROAD: Toward a self-driving, open-source digital layout implementation tool chain T Ajayi, D Blaauw Proceedings of Government Microcircuit Applications and Critical Technology …, 2019 | 113 | 2019 |
| CMP fill synthesis: A survey of recent studies AB Kahng, K Samadi Handbook of Algorithms for Physical Design Automation, 737-770, 2008 | 101 | 2008 |
| High-density integration of functional modules using monolithic 3D-IC technology S Panth, K Samadi, Y Du, SK Lim 2013 18th Asia and South Pacific Design Automation Conference (ASP-DAC), 681-686, 2013 | 98 | 2013 |
| Placement-driven partitioning for congestion mitigation in monolithic 3D IC designs S Panth, K Samadi, Y Du, SK Lim Proceedings of the 2014 on International symposium on physical design, 47-54, 2014 | 92 | 2014 |
| Flexigan: An end-to-end solution for fpga acceleration of generative adversarial networks A Yazdanbakhsh, M Brzozowski, B Khaleghi, S Ghodrati, K Samadi, ... 2018 IEEE 26th Annual International Symposium on Field-Programmable Custom …, 2018 | 85 | 2018 |
| Shrunk-2-D: A physical design methodology to build commercial-quality monolithic 3-D ICs S Panth, K Samadi, Y Du, SK Lim IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2017 | 85 | 2017 |
| Power-performance study of block-level monolithic 3D-ICs considering inter-tier performance variations S Panth, K Samadi, Y Du, SK Lim Proceedings of the 51st Annual Design Automation Conference, 1-6, 2014 | 85 | 2014 |
| BEOL stack-aware routability prediction from placement using data mining techniques WTJ Chan, Y Du, AB Kahng, S Nath, K Samadi 2016 IEEE 34th international conference on computer design (ICCD), 41-48, 2016 | 79 | 2016 |
| Fast and accurate thermal modeling and optimization for monolithic 3D ICs SK Samal, S Panth, K Samadi, M Saedi, Y Du, SK Lim Proceedings of the 51st Annual Design Automation Conference, 1-6, 2014 | 77 | 2014 |
| GAN-CTS: A generative adversarial framework for clock tree prediction and optimization YC Lu, J Lee, A Agnesina, K Samadi, SK Lim 2019 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 1-8, 2019 | 74 | 2019 |
| TP-GNN: A graph neural network framework for tier partitioning in monolithic 3D ICs YC Lu, SSK Pentapati, L Zhu, K Samadi, SK Lim 2020 57th ACM/IEEE Design Automation Conference (DAC), 1-6, 2020 | 67 | 2020 |
Sung Kyu LimProfessor, Georgia Institute of TechnologyEmail verificata su ece.gatech.edu